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SDCC ASxxxx AssemblersandSDCC ASLINK Relocating LinkerCHAPTER 1 THE ASSEMBLER 1-11.1 THE ASXXXX ASSEMBLERS 1-11.1.1 Assembly Pass 1 1-21.1.2 Assembly Pass 2 1-21.1.3 Assembly Pass 3 1-21.2 SOURCE PROGRAM FORMAT 1-31.2.1 Statement Format 1-31.2.1.1 Label Field 1-31.2.1.2 Operator Field 1-51.2.1.3 Operand Field 1-51.2.1.4 Comment Field 1-61.3 SYMBOLS AND EXPRESSIONS 1-61.3.1 Character Set 1-61.3.2 User-Defined Symbols 1-101.3.3 Reusable Symbols 1-101.3.4 Current Location Counter 1-121.3.5 Numbers 1-131.3.6 Terms 1-141.3.7 Expressions 1-141.4 GENERAL ASSEMBLER DIRECTIVES 1-161.4.1 .module Directive 1-161.4.2 .title Directive 1-161.4.3 .sbttl Directive 1-171.4.4 .list and .nlist Directives 1-171.4.5 .page Directive 1-181.4.8 .byte, .db, and .fcb Directives 1-201.4.9 .word, .dw, and .fdb Directives 1-211.4.10 .3byte and .triple Directives 1-211.4.11 .4byte and .quad Directive 1-221.4.12 .blkb, .ds, .rmb, and .rs Directives 1-221.4.13 .blkw, .blk3, and .blk4 Directives 1-221.4.14 .ascii, .str, and .fcc Directives 1-231.4.15 .ascis and .strs Directives 1-231.4.16 .asciz and .strz Directives 1-241.4.18 .radix Directive 1-251.4.19 .even Directive 1-251.4.20 .odd Directive 1-251.4.21 .bndry Directive 1-261.4.22 .area Directive 1-271.4.24 .org Directive 1-301.4.25 .globl Directive 1-311.4.26 .local Directive 1-311.4.27 .equ, .gblequ, and .lclequ Directives 1-321.4.28 .if, .else, and .endif Directives 1-331.4.29 .iff, .ift, and .iftf Directives 1-341.4.30 .ifxx Directives 1-351.4.31 .ifdef Directive 1-361.4.32 .ifndef Directive 1-371.4.33 .ifb Directive 1-381.4.34 .ifnb Directive 1-391.4.35 .ifidn Directive 1-401.4.36 .ifdif Directive 1-41Page ii1.4.37 Alternate .if Directive Forms 1-421.4.38 Immediate Conditional Assembly Directives 1-431.4.39 .include Directive 1-441.4.40 .define and .undefine Directives 1-451.4.41 .setdp Directive 1-461.4.42 .16bit, .24bit, and .32bit Directives 1-481.4.45 .end Directive 1-491.5 INVOKING ASXXXX 1-501.6 ERRORS 1-521.7 LISTING FILE 1-541.8 SYMBOL TABLE FILE 1-561.9 OBJECT FILE 1-57CHAPTER 2 THE MACRO PROCESSOR 2-12.1 DEFINING MACROS 2-12.1.1 .macro Directive 2-22.1.2 .endm Directive 2-32.1.3 .mexit Directive 2-32.2 CALLING MACROS 2-42.3 ARGUMENTS IN MACRO DEFINITIONS AND MACRO CALLS 2-52.3.1 Macro Nesting 2-62.3.2 Special Characters in Macro Arguments 2-72.3.3 Passing Numerical Arguments as Symbols 2-72.3.4 Number of Arguments in Macro Calls 2-92.3.5 Creating Local Symbols Automatically 2-92.3.6 Concatenation of Macro Arguments 2-102.4 MACRO ATTRIBUTE DIRECTIVES 2-112.4.1 .narg Directive 2-122.4.2 .nchr Directive 2-132.4.3 .ntyp Directive 2-142.4.4 .nval Directive 2-142.5 INDEFINITE REPEAT BLOCK DIRECTIVES 2-152.5.1 .irp Directive 2-162.5.2 .irpc Directive 2-172.6 REPEAT BLOCK DIRECTIVE 2-182.6.1 .rept 2-182.7 MACRO DELETION DIRECTIVE 2-192.7.1 .mdelete 2-192.8 MACRO INVOCATION DETAILS 2-192.9 BUILDING A MACRO LIBRARY 2-202.9.1 .mlib Macro Directive 2-212.9.2 .mcall Macro Directive 2-222.10 EXAMPLE MACRO CROSS ASSEMBLERS 2-24CHAPTER 3 THE LINKER 3-13.1 ASLINK RELOCATING LINKER 3-13.2 INVOKING ASLINK 3-23.3 LIBRARY PATH(S) AND FILE(S) 3-53.4 ASLINK PROCESSING 3-6Page iii3.6 ASXXXX VERSION 3.XX LINKING 3-153.6.1 Object Module Format 3-153.6.2 Header Line 3-153.6.3 Module Line 3-163.6.4 Area Line 3-163.6.5 Symbol Line 3-163.6.6 T Line 3-163.6.7 R Line 3-173.6.8 P Line 3-173.6.9 24-Bit and 32-Bit Addressing 3-183.6.10 ASlink V3.xx Error Messages 3-183.7 INTEL IHX OUTPUT FORMAT (16-BIT) 3-213.8 INTEL I86 OUTPUT FORMAT (24 OR 32-BIT) 3-223.9 MOTORLA S1-S9 OUTPUT FORMAT (16-BIT) 3-23CHAPTER 4 BUILDING ASXXXX AND ASLINK 4-14.1 BUILDING ASXXXX AND ASLINK WITH LINUX 4-24.2 BUILDING ASXXXX AND ASLINK UNDER CYGWIN 4-24.3 BUILDING ASXXXX AND ASLINK WITH DJGPP 4-34.4 BUILDING ASXXXX AND ASLINK WITH BORLAND'STURBO C++ 3.0 4-34.4.1 Graphical User Interface 4-34.4.2 Command Line Interface 4-44.5 BUILDING ASXXXX AND ASLINK WITHMS VISUAL C++ 6.0 4-54.5.1 Graphical User Interface 4-54.5.2 Command Line Interface 4-54.6 BUILDING ASXXXX AND ASLINK WITHMS VISUAL STUDIO 2005 4-64.6.1 Graphical User Interface 4-64.6.2 Command Line Interface 4-64.7 BUILDING ASXXXX AND ASLINK WITHMS VISUAL STUDIO 2010 4-74.7.1 Graphical User Interface 4-74.7.2 Command Line Interface 4-74.8 BUILDING ASXXXX AND ASLINK WITHOPEN WATCOM V1.9 4-8Page iv4.8.1 Graphical User Interface 4-84.8.2 Command Line Interface 4-84.9 BUILDING ASXXXX AND ASLINK WITHSYMANTEC C/C++ V7.2 4-94.9.1 Graphical User Interface 4-94.9.2 Command Line Interface 4-94.10 THE _CLEAN.BAT AND _PREP.BAT FILES 4-10APPENDIX AK AS68(HC[S])08 ASSEMBLER AK-1AK.1 PROCESSOR SPECIFIC DIRECTIVES AK-1AK.1.1 .hc08 Directive AK-1AK.1.2 .hcs08 Directive AK-1AK.1.3 .6805 Directive AK-2AK.1.4 .hc05 Directive AK-2AK.1.5 The .__.CPU. Variable AK-2AK.2 68HC(S)08 REGISTER SET AK-3AK.3 68HC(S)08 INSTRUCTION SET AK-3AK.3.1 Control Instructions AK-4AK.3.2 Bit Manipulation Instructions AK-4AK.3.3 Branch Instructions AK-4AK.3.4 Complex Branch Instructions AK-5AK.3.5 Read-Modify-Write Instructions AK-5AK.3.6 Register\Memory Instructions AK-6AK.3.7 Double Operand Move Instruction AK-6AK.3.8 16-Bit <H:X> Index Register Instructions AK-6AK.3.9 Jump and Jump to Subroutine Instructions AK-6Page ixAPPENDIX AR AS8051 ASSEMBLER AR-1AR.1 ACKNOWLEDGMENT AR-1AR.2 8051 REGISTER SET AR-1AR.3 8051 INSTRUCTION SET AR-2AR.3.1 Inherent Instructions AR-2AR.3.2 Move Instructions AR-3AR.3.3 Single Operand Instructions AR-3AR.3.4 Two Operand Instructions AR-4AR.3.5 Call and Return Instructions AR-4AR.3.6 Jump Instructions AR-4AR.3.7 Predefined Symbols: SFR Map AR-5AR.3.8 Predefined Symbols: SFR Bit Addresses AR-6AR.3.9 Predefined Symbols: Control Bits AR-7Page xAPPENDIX AT AS8XCXXX ASSEMBLER AT-1AT.1 ACKNOWLEDGMENTS AT-1AT.2 AS8XCXXX ASSEMBLER DIRECTIVES AT-1AT.2.1 Processor Selection Directives AT-1AT.2.2 .cpu Directive AT-2AT.2.3 Processor Addressing Range Directives AT-3AT.2.4 The .__.CPU. Variable AT-3AT.2.5 DS80C390 Addressing Mode Directive AT-4AT.2.6 The .msb Directive AT-4AT.3 DS8XCXXX REGISTER SET AT-6AT.4 DS8XCXXX INSTRUCTION SET AT-6AT.4.1 Inherent Instructions AT-7AT.4.2 Move Instructions AT-7AT.4.3 Single Operand Instructions AT-7AT.4.4 Two Operand Instructions AT-8AT.4.5 Call and Return Instructions AT-8AT.4.6 Jump Instructions AT-8AT.5 DS8XCXXX SPECIAL FUNCTION REGISTERS AT-9AT.5.1 SFR Map AT-9AT.5.2 Bit Addressable Registers: Generic AT-10AT.5.3 Bit Addressable Registers: Specific AT-11AT.5.4 Optional Symbols: Control Bits AT-12AT.6 DS80C310 SPECIAL FUNCTION REGISTERS AT-13AT.6.1 SFR Map AT-13AT.6.2 Bit Addressable Registers: Generic AT-14AT.6.3 Bit Addressable Registers: Specific AT-15AT.6.4 Optional Symbols: Control Bits AT-16AT.7 DS80C320/DS80C323 SPECIAL FUNCTION REGISTERS AT-17AT.7.1 SFR Map AT-17AT.7.2 Bit Addressable Registers: Generic AT-18AT.7.3 Bit Addressable Registers: Specific AT-19AT.7.4 Optional Symbols: Control Bits AT-20AT.8 DS80C390 SPECIAL FUNCTION REGISTERS AT-21AT.8.1 SFR Map AT-21AT.8.2 Bit Addressable Registers: Generic AT-22AT.8.3 Bit Addressable Registers: Specific AT-23AT.8.4 Optional Symbols: Control Bits AT-24AT.9 DS83C520/DS87C520 SPECIAL FUNCTION REGISTERS AT-26AT.9.1 SFR Map AT-26AT.9.2 Bit Addressable Registers: Generic AT-27AT.9.3 Bit Addressable Registers: Specific AT-28AT.9.4 Optional Symbols: Control Bits AT-29AT.10 DS83C530/DS87C530 SPECIAL FUNCTION REGISTERS AT-30AT.10.1 SFR Map AT-30AT.10.2 Bit Addressable Registers: Generic AT-31AT.10.3 Bit Addressable Registers: Specific AT-32AT.10.4 Optional Symbols: Control Bits AT-33AT.11 DS83C550/DS87C550 SPECIAL FUNCTION REGISTERS AT-34AT.11.1 SFR Map AT-34AT.11.2 Bit Addressable Registers: Generic AT-36AT.11.3 Bit Addressable Registers: Specific AT-37AT.11.4 Optional Symbols: Control Bits AT-39Page xiAPPENDIX AY ASGB ASSEMBLER AY-1AY.1 ACKNOWLEDGEMENT AY-1AY.2 INTRODUCTION AY-1AY.3 GAMEBOY REGISTER SET AND CONDITIONS AY-1AY.4 GAMEBOY INSTRUCTION SET AY-2AY.4.1 .tile Directive AY-2AY.4.2 Potentially Controversial Mnemonic Selection AY-4AY.4.2.1 Auto-Indexing Loads AY-4AY.4.2.2 Input and Output Operations AY-4AY.4.2.3 The 'stop' Instruction AY-5AY.4.3 Inherent Instructions AY-5AY.4.4 Implicit Operand Instructions AY-5AY.4.5 Load Instructions AY-6AY.4.6 Call/Return Instructions AY-6AY.4.7 Jump Instructions AY-6AY.4.8 Bit Manipulation Instructions AY-6AY.4.9 Input and Output Instructions AY-7AY.4.10 Register Pair Instructions AY-7APPENDIX BC ASRAB ASSEMBLER BC-1BC.1 ACKNOWLEDGMENT BC-1BC.2 PROCESSOR SPECIFIC DIRECTIVES BC-1BC.2.1 .r2k Directive BC-2BC.2.2 .hd64 Directive BC-2BC.2.3 .z80 Directive BC-2BC.2.4 The .__.CPU. Variable BC-3BC.3 RABBIT 2000/3000 ADDRESSING AND INSTRUCTIONS BC-4BC.3.1 Instruction Symbols BC-4BC.3.2 Rabbit Instructions BC-6BC.4 Z80/HD64180 ADDRESSING AND INSTRUCTIONS BC-8BC.4.1 Inherent Instructions BC-9BC.4.2 Implicit Operand Instructions BC-9BC.4.3 Load Instruction BC-10BC.4.4 Call/Return Instructions BC-10BC.4.5 Jump and Jump to Subroutine Instructions BC-10BC.4.6 Bit Manipulation Instructions BC-11BC.4.7 Interrupt Mode and Reset Instructions BC-11BC.4.8 Input and Output Instructions BC-11BC.4.9 Register Pair Instructions BC-11BC.4.10 HD64180 Specific Instructions BC-12Page xiiiAPPENDIX BI ASZ80 ASSEMBLER BI-1BI.1 .z80 DIRECTIVE BI-1BI.2 .hd64 DIRECTIVE BI-1BI.3 THE .__.CPU. VARIABLE BI-2BI.4 Z80 REGISTER SET AND CONDITIONS BI-2BI.5 Z80 INSTRUCTION SET BI-3BI.5.1 Inherent Instructions BI-4BI.5.2 Implicit Operand Instructions BI-4BI.5.3 Load Instruction BI-5BI.5.4 Call/Return Instructions BI-5BI.5.5 Jump and Jump to Subroutine Instructions BI-5BI.5.6 Bit Manipulation Instructions BI-6BI.5.7 Interrupt Mode and Reset Instructions BI-6BI.5.8 Input and Output Instructions BI-6BI.5.9 Register Pair Instructions BI-6BI.5.10 HD64180/Z180 Specific Instructions BI-7Page 2P R E F A C EThe ASxxxx assemblers were written following the style ofseveral unfinished cross assemblers found in the Digital Equip-ment Corporation Users Society (DECUS) distribution of the Cprogramming language. The incomplete DECUS code was providedwith no documentation as to the input syntax or the outputformat. I wish to thank the author for inspiring me to beginthe development of this set of assemblers.The ASLINK program was written as a companion to the ASxxxxassemblers, its design and implementation was not derived fromany other work.I would greatly appreciate receiving the details of anychanges, additions, or errors pertaining to these programs andwill attempt to incorporate any fixes or generally usefulchanges in a future update to these programs.Alan R. BaldwinKent State UniversityPhysics DepartmentKent, Ohio 44242U.S.A.http://shop-pdp.nethttp://shop-pdp.kent.edu/baldwin@shop-pdp.netbaldwin@shop-pdp.kent.edubaldwin@kent.edutel: (330) 672 2531fax: (330) 672 2959Page 3E N D U S E R L I C E N S E A G R E E M E N TCopyright (C) 1989-2012 Alan R. BaldwinThis program is free software: you can redistribute itand/or modify it under the terms of the GNU General PublicLicense as published by the Free Software Foundation, eitherversion 3 of the License, or (at your option) any later version.This program is distributed in the hope that it will be use-ful, but WITHOUT ANY WARRANTY; without even the implied war-ranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.See the GNU General Public License for more details.You should have received a copy of the GNU General PublicLicense along with this program. If not, see<http://www.gnu.org/licenses/>.Page 4C O N T R I B U T O R SThanks to Marko Makela for his contribution of the AS6500 crossassembler.Marko MakelaSillitie 10 A01480 VantaaFinlandInternet: Marko dot Makela at Helsinki dot FiEARN/BitNet: msmakela at finuhThanks to John Hartman for his contribution of the AS8051 crossassembler and updates to the ASxxxx and ASLINK internals.John L. Hartmanjhartman at compuserve dot comnoice at noicedebugger dot comThanks to G. Osborn for his contributions to LKS19.C andLKIHX.C.G. Osborngary at s-4 dot comThanks to Ken Hornstein for his contribution of object librariescontained in LKLIBR.C.Ken Hornsteinkenh at cmf dot nrl dot navy dot milPage 5Thanks to Bill McKinnon for his contributions to the AS8XCXXXcross assembler for the DS8XCXXX series of microprocessors.Bill McKinnonw_mckinnon at conknet dot comThanks to Roger Ivie for his contribution of the ASGB cross as-sembler for the GameBoy.Roger Ivieivie at cc dot usu dot eduThanks to Uwe Steller for his contribution of the AS740 crossassembler.Uwe StellarUwe dot Steller at t-online dot deThanks to Shujen Chen for his contribution of the AS1802 crossassembler.Shugen ChenDeVry UniversityTinley Park ILschen at tp dot devry dot eduThanks to Edgar Puehringer for his contribution of the AS61860cross assembler.Edgar Puehringeredgar_pue at yahoo dot comPage 6Thanks to Ulrich Raich and Razaq Ijoduola for their contributionof the ASRAB cross assembler.Ulrich Raich and Razaq IjoduolaPS DivisionCERNCH-1211 Geneva-23Ulrich dot Raich at cern dot chThanks to Patrick Head for his contribution of the ASEZ80 crossassembler.Patrick Headpatrick at phead dot netThanks to Boisy G. Pitre for contributing the .ifeq, .ifne,.ifgt, .iflt, .ifle, and .ifge conditional directives and theTandy Color Computer Disk Basic binary output for ASLINK.Boisy G. Pitreboisy at boisypitre dot comThanks to Mike McCarty for his contributions to the processorcycle count option of the ASxxxx Assemblers.Mike McCartymike dot mccarty at sbcglobal dot netThanks to Mengjin Su for his contribution of the PIC18Fxxx Ex-tended Instructions.Mengjin Sumsu at micron dot comPage 7Thanks to Carl Rash for his contribution of the Visual Studio2010 project files.Carl Rashcrash at triad dot rr dot comPage 8ASxxxx Cross Assemblers, Version 5.05, August 2012Submitted by Alan R. Baldwin,Kent State University, Kent, OhioOperating System: Linux, Windows, MS-DOSor other supporting ANSI C.Source Langauge: CAbstract:The ASxxxx assemblers are a series of microprocessor assem-blers written in the C programming language. This collectioncontains cross assemblers for the 1802, S2650, SC/MP, MPS430,61860, 6500, 6800(6802/6808), 6801(6803/HD6303), 6804, 6805,68HC(S)08, 6809, 68HC11, 68HC(S)12, 68HC16, 740,8048(8041/8022/8021) 8051, 8085(8080), DS8xCxxx, AVR, EZ80,F2MC8L/FX, F8/3870, GameBoy(Z80), H8/3xx, Cypress PSoC(M8C),PIC, Rabbit 2000/3000, asst6, asst7, asst8, Z8, and Z80(HD64180)series microprocessors. Each assembler has a device specificsection which includes: (1) device description, byte order, andfile extension information, (2) a table of assembler generaldirectives, special directives, assembler mnemonics and asso-ciated operation codes, (3) machine specific code for processingthe device mnemonics, addressing modes, and special directives.The assemblers have a common device independent section whichhandles the details of file input/output, symbol table genera-tion, program/data areas, expression analysis, and assemblerdirective processing.The assemblers provide the following features: (1) alpha-betized, formatted symbol table listings, (2) relocatable objectmodules, (3) global symbols for linking object modules, (4) con-ditional assembly directives, (5) reusable local symbols, (6)include-file processing, and (7) a general macro processingfacility.The companion program ASLINK is a relocating linker perform-ing the following functions: (1) bind multiple object modulesinto a single memory image, (2) resolve inter-module symbolreferences, (3) resolve undefined symbols from specifiedlibrarys of object modules, (4) process absolute, relative, con-catenated, and overlay attributes in data and program sections,(5) perform byte and word program-counter relative (pc or pcr)addressing calculations, (6) define absolute symbol values atlink time, (7) define absolute area base address values at linktime, (8) produce an Intel Hex record, Motorola S record orTandy CoCo Disk Basic output file, (9) produce a map of thelinked memory image, and (10) update the ASxxxx assemblerlisting files with the absolute linked addresses and data.Page 9The assemblers and linker have been tested using Linux andDJGPP, Cygwin, Symantec C/C++ V7.2, Borland Turbo C++ 3.0, OpenWatcom V1.9, VC6, Visual Studio 2005, and Visual Studio 2010.Complete source code and documentation for the assemblers andlinker is included with the distribution. Additionally, testcode for each assembler and several microprocessor monitors (ASSIST05 for the 6805, MONDEB and ASSIST09 for the 6809, andBUFFALO 2.5 for the 6811) are included as working examples ofuse of these assemblers.CHAPTER 1THE ASSEMBLER1.1 THE ASXXXX ASSEMBLERSThe ASxxxx assemblers are a series of microprocessor assem-blers written in the C programming language. Each assembler hasa device specific section which includes:1. device description, byte order, and file extension in-formation2. a table of the assembler general directives, specialdevice directives, assembler mnemonics and associatedoperation codes3. machine specific code for processing the device mnemon-ics, addressing modes, and special directivesThe device specific information is detailed in the appendices.The assemblers have a common device independent section whichhandles the details of file input/output, symbol table genera-tion, program/data areas, expression analysis, and assemblerdirective processing.The assemblers provide the following features:1. Command string control of assembly functions2. Alphabetized, formatted symbol table listing3. Relocatable object modules4. Global symbols for linking object modules5. Conditional assembly directivesTHE ASSEMBLER PAGE 1-2THE ASXXXX ASSEMBLERS6. Program sectioning directivesASxxxx assembles one or more source files into a single relo-catable ascii object file. The output of the ASxxxx assemblersconsists of an ascii relocatable object file(*.rel), an assemblylisting file(*.lst), and a symbol file(*.sym).1.1.1 Assembly Pass 1During pass 1, ASxxxx opens all source files and performs arudimentary assembly of each source statement. During this pro-cess all symbol tables are built, program sections defined, andnumber of bytes for each assembled source line is estimated.At the end of pass 1 all undefined symbols may be made global(external) using the ASxxxx switch -g, otherwise undefined sym-bols will be flagged as errors during succeeding passes.1.1.2 Assembly Pass 2During pass 2 the ASxxxx assembler resolves forward refer-ences and determines the number of bytes for each assembledline. The number of bytes used by a particular assembler in-struction may depend upon the addressing mode, whether the in-struction allows multiple forms based upon the relative distanceto the addressed location, or other factors. Pass 2 resolvesthese cases and determines the address of all symbols.1.1.3 Assembly Pass 3Pass 3 by the assembler generates the listing file, the relo-catable output file, and the symbol tables. Also during pass 3the errors will be reported.The relocatable object file is an ascii file containing sym-bol references and definitions, program area definitions, andthe relocatable assembled code, the linker ASLINK will use thisinformation to generate an absolute load file (Intel or Motorolaformats).THE ASSEMBLER PAGE 1-3SOURCE PROGRAM FORMAT1.2 SOURCE PROGRAM FORMAT1.2.1 Statement FormatA source program is composed of assembly-language statements.Each statement must be completed on one line. A line may con-tain a maximum of 128 characters, longer lines are truncated andlost.An ASxxxx assembler statement may have as many as fourfields. These fields are identified by their order within thestatement and/or by separating characters between fields. Thegeneral format of the ASxxxx statement is:[label:] Operator Operand [;Comment(s)]The label and comment fields are optional. The operator andoperand fields are interdependent. The operator field may be anassembler directive or an assembly mnemonic. The operand fieldmay be optional or required as defined in the context of theoperator.ASxxxx interprets and processes source statements one at atime. Each statement causes a particular operation to be per-formed.1.2.1.1 Label Field -A label is a user-defined symbol which is assigned the valueof the current location counter and entered into the user de-fined symbol table. The current location counter is used byASxxxx to assign memory addresses to the source program state-ments as they are encountered during the assembly process. Thusa label is a means of symbolically referring to a specificstatement.When a program section is absolute, the value of the currentlocation counter is absolute; its value references an absolutememory address. Similarly, when a program section is relocat-able, the value of the current location counter is relocatable.A relocation bias calculated at link time is added to the ap-parent value of the current location counter to establish itseffective absolute address at execution time. (The user canalso force the linker to relocate sections defined as absolute.This may be required under special circumstances.)If present, a label must be the first field in a sourcestatement and must be terminated by a colon (:). For example,THE ASSEMBLER PAGE 1-4SOURCE PROGRAM FORMATif the value of the current location counter is absolute01F0(H), the statement:abcd: nopassigns the value 01F0(H) to the label abcd. If the locationcounter value were relocatable, the final value of abcd would be01F0(H)+K, where K represents the relocation bias of the programsection, as calculated by the linker at link time.More than one label may appear within a single label field.Each label so specified is assigned the same address value. Forexample, if the value of the current location counter is1FF0(H), the multiple labels in the following statement are eachassigned the value 1FF0(H):abcd: aq: $abc: nopMultiple labels may also appear on successive lines. For ex-ample, the statementsabcd:aq:$abc: noplikewise cause the same value to be assigned to all three la-bels.A double colon (::) defines the label as a global symbol.For example, the statementabcd:: nopestablishes the label abcd as a global symbol. The distinguish-ing attribute of a global symbol is that it can be referencedfrom within an object module other than the module in which thesymbol is defined. References to this label in other modulesare resolved when the modules are linked as a composite execut-able image.The legal characters for defining labels are:A through Za through z0 through 9. (Period)$ (Dollar sign)_ (underscore)A label may be any length, however only the first 79characters are significant and, therefore must be unique amongall labels in the source program (not necessarily amongTHE ASSEMBLER PAGE 1-5SOURCE PROGRAM FORMATseparately compiled modules). An error code(s) (m or p) will begenerated in the assembly listing if the first 79 characters intwo or more labels are the same. The m code is caused by theredeclaration of the symbol or its reference by another state-ment. The p code is generated because the symbols location ischanging on each pass through the source file.The label must not start with the characters 0-9, as thisdesignates a reusable symbol with special attributes describedin a later section.The label must not start with the sequence $$, as thisrepresents the temporary radix 16 for constants.1.2.1.2 Operator Field -The operator field specifies the action to be performed. Itmay consist of an instruction mnemonic (op code) or an assemblerdirective.When the operator is an instruction mnemonic, a machine in-struction is generated and the assembler evaluates the addressesof the operands which follow. When the operator is a directiveASxxxx performs certain control actions or processing operationsduring assembly of the source program.Leading and trailing spaces or tabs in the operator fieldhave no significance; such characters serve only to separatethe operator field from the preceeding and following fields.An operator is terminated by a space, tab or end of line.1.2.1.3 Operand Field -When the operator is an instruction mnemonic (op code), theoperand field contains program variables that are to beevaluated/manipulated by the operator.Operands may be expressions or symbols, depending on theoperator. Multiple expressions used in the operand fields maybe separated by a comma. An operand should be preceeded by anoperator field; if it is not, the statement will give an error(q or o). All operands following instruction mnemonics aretreated as expressions.The operand field is terminated by a semicolon when the fieldis followed by a comment. For example, in the followingstatement:label: lda abcd,x ;Comment fieldTHE ASSEMBLER PAGE 1-6SOURCE PROGRAM FORMATthe tab between lda and abcd terminates the operator field anddefines the beginning of the operand field; a comma separatesthe operands abcd and x; and a semicolon terminates the operandfield and defines the beginning of the comment field. When nocomment field follows, the operand field is terminated by theend of the source line.1.2.1.4 Comment Field -The comment field begins with a semicolon and extends throughthe end of the line. This field is optional and may contain any7-bit ascii character except null.Comments do not affect assembly processing or program execu-tion.1.3 SYMBOLS AND EXPRESSIONSThis section describes the generic components of the ASxxxxassemblers: the character set, the conventions observed in con-structing symbols, and the use of numbers, operators, and ex-pressions.1.3.1 Character SetThe following characters are legal in ASxxxx source programs:1. The letters A through Z. Both upper- and lower-caseletters are acceptable. The assemblers, by default,are case sensitive, i.e. ABCD and abcd are not thesame symbols. (The assemblers can be made case insen-sitive by using the -z command line option.)2. The digits 0 through 93. The characters . (period), $ (dollar sign), and _ (un-derscore).4. The special characters listed in Tables 1 through 6.Tables 1 through 6 describe the various ASxxxx label andfield terminators, assignment operators, operand separators, as-sembly, unary, binary, and radix operators.THE ASSEMBLER PAGE 1-7SYMBOLS AND EXPRESSIONSTable 1 Label Terminators and Assignment Operators----------------------------------------------------------------: Colon Label terminator.:: Double colon Label Terminator; defines thelabel as a global label.= Equal sign Direct assignment operator.== Global equal Direct assignment operator; de-fines the symbol as a globalsymbol.=: Local equal Direct assignment operator; de-fines the symbol as a local sym-bol.----------------------------------------------------------------Table 2 Field Terminators and Operand Separators----------------------------------------------------------------Tab Item or field terminator.Space Item or field terminator., Comma Operand field separator.; Semicolon Comment field indicator.----------------------------------------------------------------THE ASSEMBLER PAGE 1-8SYMBOLS AND EXPRESSIONSTable 3 Assembler Operators----------------------------------------------------------------# Number sign Immediate expression indicator.. Period Current location counter.( Left parenthesis Expression delimiter.) Right parenthesis Expression delimeter.----------------------------------------------------------------Table 4 Unary Operators----------------------------------------------------------------< Left bracket <FEDC Produces the lower bytevalue of the expression.(DC)> Right bracket >FEDC Produces the upper bytevalue of the expression.(FE)+ Plus sign +A Positive value of A- Minus sign -A Produces the negative(2's complement) of A.~ Tilde ~A Produces the 1's comple-ment of A.' Single quote 'D Produces the value ofthe character D." Double quote "AB Produces the double bytevalue for AB.\ Backslash '\n Unix style characters\b, \f, \n, \r, \tor '\001 or octal byte values.----------------------------------------------------------------THE ASSEMBLER PAGE 1-9SYMBOLS AND EXPRESSIONSTable 5 Binary Operators----------------------------------------------------------------<< Double 0800 << 4 Produces the 4 bitLeft bracket left-shifted value of0800. (8000)>> Double 0800 >> 4 Produces the 4 bitRight bracket right-shifted value of0800. (0080)+ Plus sign A + B Arithmetic Additionoperator.- Minus sign A - B Arithmetic Subtractionoperator.* Asterisk A * B Arithmetic Multiplica-tion operator./ Slash A / B Arithmetic Divisionoperator.& Ampersand A & B Logical AND operator.| Bar A | B Logical OR operator.% Percent sign A % B Modulus operator.^ Up arrow or A ^ B EXCLUSIVE OR operator.circumflex----------------------------------------------------------------Table 6 Temporary Radix Operators----------------------------------------------------------------$%, 0b, 0B Binary radix operator.$&, 0o, 0O, 0q, 0Q Octal radix operator.$#, 0d, 0D Decimal radix operator.$$, 0h, 0H, 0x, 0X Hexadecimal radix operator.Potential ambiguities arising from the use of 0b and 0das temporary radix operators may be circumvented byTHE ASSEMBLER PAGE 1-10SYMBOLS AND EXPRESSIONSpreceding all non-prefixed hexadecimal numbers with 00.Leading 0's are required in any case where the firsthexadecimal digit is abcdef as the assembler will treatthe letter sequence as a label.----------------------------------------------------------------1.3.2 User-Defined SymbolsUser-defined symbols are those symbols that are equated to aspecific value through a direct assignment statement or appearas labels. These symbols are added to the User Symbol Table asthey are encountered during assembly.The following rules govern the creation of user-defined symbols:1. Symbols can be composed of alphanumeric characters,dollar signs ($), periods (.), and underscores (_)only.2. The first character of a symbol must not be a number(except in the case of reusable symbols).3. The first 79 characters of a symbol must be unique. Asymbol can be written with more than 79 legalcharacters, but the 80th and subsequent characters areignored.4. Spaces and Tabs must not be embedded within a symbol.1.3.3 Reusable SymbolsReusable symbols are specially formatted symbols used as la-bels within a block of coding that has been delimited as a reus-able symbol block. Reusable symbols are of the form n$, where nis a decimal integer from 0 to 65535, inclusive. Examples ofreusable symbols are:1$27$138$244$THE ASSEMBLER PAGE 1-11SYMBOLS AND EXPRESSIONSThe range of a reusable symbol block consists of those state-ments between two normally constructed symbolic labels. Notethat a statement of the form:ALPHA = EXPRESSIONis a direct assignment statement but does not create a label andthus does not delimit the range of a reusable symbol block.Note that the range of a reusable symbol block may extendacross program areas.Reusable symbols provide a convenient means of generating la-bels for branch instructions and other such references withinreusable symbol blocks. Using reusable symbols reduces the pos-sibility of symbols with multiple definitions appearing within auser program. In addition, the use of reusable symbols dif-ferentiates entry-point labels from other labels, since reusablelabels cannot be referenced from outside their respective symbolblocks. Thus, reusable symbols of the same name can appear inother symbol blocks without conflict. Reusable symbols requireless symbol table space than normal symbols. Their use isrecommended.The use of the same reusable symbol within a symbol blockwill generate one or both of the m or p errors.Example of reusable symbols:a: ldx #atable ;get table addresslda #0d48 ;table length1$: clr ,x+ ;cleardecabne 1$b: ldx #btable ;get table addresslda #0d48 ;table length1$: clr ,x+ ;cleardecabne 1$THE ASSEMBLER PAGE 1-12SYMBOLS AND EXPRESSIONS1.3.4 Current Location CounterThe period (.) is the symbol for the current location coun-ter. When used in the operand field of an instruction, theperiod represents the address of the first byte of theinstruction:AS: ldx #. ;The period (.) refers to;the address of the ldx;instruction.When used in the operand field of an ASxxxx directive, itrepresents the address of the current byte or word:QK = 0.word 0xFFFE,.+4,QK ;The operand .+4 in the .word;directive represents a value;stored in the second of the;three words during assembly.If we assume the current value of the program counter is0H0200, then during assembly, ASxxxx reserves three words ofstorage starting at location 0H0200. The first value, a hex-idecimal constant FFFE, will be stored at location 0H0200. Thesecond value represented by .+4 will be stored at location0H0202, its value will be 0H0206 ( = 0H0202 + 4). The thirdvalue defined by the symbol QK will be placed at location0H0204.At the beginning of each assembly pass, ASxxxx resets the lo-cation counter. Normally, consecutive memory locations are as-signed to each byte of object code generated. However, thevalue of the location counter can be changed through a directassignment statement of the following form:. = . + expressionThe new location counter can only be specified relative tothe current location counter. Neglecting to specify the currentprogram counter along with the expression on the right side ofthe assignment operator will generate the (.) error. (Absoluteprogram areas may use the .org directive to specify the absolutelocation of the current program counter.)The following coding illustrates the use of the current locationcounter:.area CODE1 (ABS) ;program area CODE1;is ABSOLUTETHE ASSEMBLER PAGE 1-13SYMBOLS AND EXPRESSIONS.org 0H100 ;set location to;0H100 absolutenum1: ldx #.+0H10 ;The label num1 has;the value 0H100.;X is loaded with;0H100 + 0H10.org 0H130 ;location counter;set to 0H130num2: ldy #. ;The label num2 has;the value 0H130.;Y is loaded with;value 0H130..area CODE2 (REL) ;program area CODE2;is RELOCATABLE. = . + 0H20 ;Set location counter;to relocatable 0H20 of;the program section.num3: .word 0 ;The label num3 has;the value;of relocatable 0H20.. = . + 0H40 ;will reserve 0H40;bytes of storage as will.blkb 0H40 ;or.blkw 0H20The .blkb and .blkw directives are the preferred methods ofallocating space.1.3.5 NumbersASxxxx assumes that all numbers in the source program are tobe interpreted in decimal radix unless otherwise specified. The.radix directive may be used to specify the default as octal,decimal, or hexadecimal. Individual numbers can be designatedas binary, octal, decimal, or hexadecimal through the temporaryradix prefixes shown in table 6.Negative numbers must be preceeded by a minus sign; ASxxxxtranslates such numbers into two's complement form. Positivenumbers may (but need not) be preceeded by a plus sign.THE ASSEMBLER PAGE 1-14SYMBOLS AND EXPRESSIONSNumbers are always considered to be absolute values, thereforthey are never relocatable.1.3.6 TermsA term is a component of an expression and may be one of thefollowing:1. A number.2. A symbol:1. A period (.) specified in an expression causes thecurrent location counter to be used.2. A User-defined symbol.3. An undefined symbol is assigned a value of zero andinserted in the User-Defined symbol table as an un-defined symbol.3. A single quote followed by a single ascii character, ora double quote followed by two ascii characters.4. An expression enclosed in parenthesis. Any expressionso enclosed is evaluated and reduced to a single termbefore the remainder of the expression in which it ap-pears is evaluated. Parenthesis, for example, may beused to alter the left-to-right evaluation of expres-sions, (as in A*B+C versus A*(B+C)), or to apply a un-ary operator to an entire expression (as in -(A+B)).5. A unary operator followed by a symbol or number.1.3.7 ExpressionsExpressions are combinations of terms joined together bybinary operators. Expressions reduce to a value. The evalua-tion of an expression includes the determination of its attri-butes. A resultant expression value may be one of three types(as described later in this section): relocatable, absolute,and external.THE ASSEMBLER PAGE 1-15SYMBOLS AND EXPRESSIONSExpressions are evaluate with an operand hierarchy as follows:* / % multiplication,division, andmodulus first.+ - addition andsubtraction second.<< >> left shift andright shift third.^ exclusive or fourth.& logical and fifth.| logical or lastexcept that unary operators take precedence over binaryoperators.A missing or illegal operator terminates the expressionanalysis, causing error codes (o) and/or (q) to be generateddepending upon the context of the expression itself.At assembly time the value of an external (global) expressionis equal to the value of the absolute part of that expression.For example, the expression external+4, where 'external' is anexternal symbol, has the value of 4. This expression, however,when evaluated at link time takes on the resolved value of thesymbol 'external', plus 4.Expressions, when evaluated by ASxxxx, are one of threetypes: relocatable, absolute, or external. The following dis-tinctions are important:1. An expression is relocatable if its value is fixed re-lative to the base address of the program area in whichit appears; it will have an offset value added at linktime. Terms that contain labels defined in relocatableprogram areas will have a relocatable value; simi-larly, a period (.) in a relocatable program area,representing the value of the current program locationcounter, will also have a relocatable value.2. An expression is absolute if its value is fixed. Anexpression whose terms are numbers and ascii characterswill reduce to an absolute value. A relocatable ex-pression or term minus a relocatable term, where bothelements being evaluated belong to the same programarea, is an absolute expression. This is because everyTHE ASSEMBLER PAGE 1-16SYMBOLS AND EXPRESSIONSterm in a program area has the same relocation bias.When one term is subtracted from the other the reloca-tion bias is zero.3. An expression is external (or global) if it contains asingle global reference (plus or minus an absolute ex-pression value) that is not defined within the currentprogram. Thus, an external expression is only par-tially defined following assembly and must be resolvedat link time.1.4 GENERAL ASSEMBLER DIRECTIVESAn ASxxxx directive is placed in the operator field of thesource line. Only one directive is allowed per source line.Each directive may have a blank operand field or one or moreoperands. Legal operands differ with each directive.1.4.1 .module DirectiveFormat:.module nameThe .module directive causes the name to be included in theassemblers output file as an identifier for this particular ob-ject module. The name may be from 1 to 79 characters in length.The name may not have any embedded white space (spaces or tabs).Only one identifier is allowed per assembled module. The mainuse of this directive is to allow the linker to report amodules' use of undefined symbols. At link time all undefinedsymbols are reported and the modules referencing them arelisted.1.4.2 .title DirectiveFormat:.title stringThe .title directive provides a character string to be placedon the second line of each page during listing. The string be-gins with the first non white space character (after any spaceor tab) and ends with the end of the line.THE ASSEMBLER PAGE 1-17GENERAL ASSEMBLER DIRECTIVES1.4.3 .sbttl DirectiveFormat:.sbttl stringThe .sbttl directive provides a character string to be placedon the third line of each page during listing. The string be-gins with the first non white space character (after any spaceor tab) and ends with the end of the line.1.4.4 .list and .nlist DirectivesFormat:.list ;Basic .list.list expr ;with expression.list (arg1,arg2,...,argn) ;with sublist options.nlist ;Basic .nlist.nlist expr ;with expression.nlist (arg1,arg2,...,argn) ;with sublist optionsThe .list and .nlist directives control the listing output tothe .lst file. The directives have the following sublistoptions:err - errorsloc - program locationbin - binary outputeqt - symbol or .if evaluationcyc - opcode cycle countlin - source line numbersrc - source line textpag - paginationlst - .list/.nlist line listingmd - macro definition listingme - macro expansion listingmeb - macro expansion binary listing! - sets the listing mode to!(.list) or !(.nlist) beforeapplying the sublist optionsThe 'normal' listing mode .list is the combination of err, loc,THE ASSEMBLER PAGE 1-18GENERAL ASSEMBLER DIRECTIVESbin, eqt, cyc, lin, src, pag, lst, and md enabled with me andmeb disabled. The 'normal' listing mode .nlist has all sublistitems disabled. When specifying sublist options the option listmust be enclosed within parenthesis and multiple optionsseperated by commas.The NOT option, !, is used to set the listing mode to the op-posite of the .list or .nlist directive before applying the sub-list options. For example:.nlist (!) is equivalent to .list and.list (!) is equivalent to .nlistany additional options willbe applied normallyNormal .list/.nlist processing is disabled within false con-ditional blocks. However, the .list/.nlist with an expressioncan override this behavior if the expression has a non zerovalue.Examples of listing options:.list (meb) ; lists macro generated binary.list (me) ; lists macro expansions.nlist (src) ; .nlist src lines not listed.nlist (!,lst) ; list all except .nlist.nlist ; combination lists only.list (src) ; the source line.list (!,src) ; list only the source line.list 1 ; enable listing even within; a FALSE conditional block1.4.5 .page DirectiveFormat:.pageThe .page directive causes a page ejection with a new headingto be printed. The new page occurs after the next line of thesource program is processed, this allows an immediately follow-ing .sbttl directive to appear on the new page. The .pagesource line will not appear in the file listing. Paging may bedisabled by invoking the -p directive or by using the directive:THE ASSEMBLER PAGE 1-19GENERAL ASSEMBLER DIRECTIVES.nlist (pag)If the .page directive is followed by a non zero constant oran expression that evaluates to a non zero value then paginationwill be enabled within a false condition range to allow extendedtextual information to be incorporated in the source programwith out the need to use the comment delimiter (;):.if 0.page 1 ;Enable pagination within 'if' block.This text will be bypassed during assemblybut appear in the listing file.....endif1.4.8 .byte, .db, and .fcb DirectivesFormat:.byte exp ;Stores the binary value.db exp ;of the expression in the.fcb exp ;next byte..byte exp1,exp2,expn ;Stores the binary values.db exp1,exp2,expn ;of the list of expressions.fcb exp1,exp2,expn ;in successive bytes.where: exp, represent expressions that will beexp1, truncated to 8-bits of data.. Each expression will be calculated,. the high-order byte will be truncated.. Multiple expressions must beexpn separated by commas.The .byte, .db, or .fcb directives are used to generate suc-cessive bytes of binary data in the object module.THE ASSEMBLER PAGE 1-21GENERAL ASSEMBLER DIRECTIVES1.4.9 .word, .dw, and .fdb DirectivesFormat:.word exp ;Stores the binary value.dw exp ;of the expression in.fdb exp ;the next word..word exp1,exp2,expn ;Stores the binary values.dw exp1,exp2,expn ;of the list of expressions.fdb exp1,exp2,expn ;in successive words.where: exp, represent expressions that will occupy twoexp1, bytes of data. Each expression will be. calculated as a 16-bit word expression.. Multiple expressions must beexpn separated by commas.The .word, .dw, or .fdb directives are used to generate suc-cessive words of binary data in the object module.THE ASSEMBLER PAGE 1-22GENERAL ASSEMBLER DIRECTIVES1.4.12 .blkb, .ds, .rmb, and .rs DirectivesFormat:.blkb N ;reserve N bytes of space.ds N ;reserve N bytes of space.rmb N ;reserve N bytes of space.rs N ;reserve N bytes of spaceThe .blkb, .ds, .rmb, and .rs directives reserve byte blocksin the object module;1.4.13 .blkw, .blk3, and .blk4 DirectivesFormat:.blkw N ;reserve N words of space.blk3 N ;reserve N triples of space.blk4 N ;reserve N quads of spaceThe .blkw directive reserves word blocks; the .blk3 reserves3 byte blocks(available in assemblers supporting 24-bitaddressing); the .blk4 reserves 4 byte blocks (available in as-semblers supporting 32-bit addressing).THE ASSEMBLER PAGE 1-23GENERAL ASSEMBLER DIRECTIVES1.4.14 .ascii, .str, and .fcc DirectivesFormat:.ascii /string/ or.ascii ^/string/.fcc /string/ or.fcc ^/string/.str /string/ or.str ^/string/where: string is a string of printable ascii characters./ / represent the delimiting characters. Thesedelimiters may be any paired printingcharacters, as long as the characters are notcontained within the string itself. If thedelimiting characters do not match, the .asciidirective will give the (q) error.The .ascii, .fcc, and .str directives place one binary byte ofdata for each character in the string into the object module.1.4.15 .ascis and .strs DirectivesFormat:.ascis /string/ or.ascis ^/string/.strs /string/ or.strs ^/string/where: string is a string of printable ascii characters./ / represent the delimiting characters. Thesedelimiters may be any paired printingcharacters, as long as the characters are notcontained within the string itself. If thedelimiting characters do not match, the .ascisand .strs directives will give the (q) error.THE ASSEMBLER PAGE 1-24GENERAL ASSEMBLER DIRECTIVESThe .ascis and .strs directives place one binary byte of datafor each character in the string into the object module. Thelast character in the string will have the high order bit set.1.4.16 .asciz and .strz DirectivesFormat:.asciz /string/ or.asciz ^/string/.strz /string/ or.strz ^/string/where: string is a string of printable ascii characters./ / represent the delimiting characters. Thesedelimiters may be any paired printingcharacters, as long as the characters are notcontained within the string itself. If thedelimiting characters do not match, the .ascizand .strz directive will give the (q) error.The .asciz and .strz directives place one binary byte of datafor each character in the string into the object module. Fol-lowing all the character data a zero byte is inserted to ter-minate the character string.THE ASSEMBLER PAGE 1-25GENERAL ASSEMBLER DIRECTIVES1.4.18 .radix DirectiveFormat:.radix characterwhere: character represents a single character specifying thedefault radix to be used for succeeding numbers. Thecharacter may be any one of the following:B,b BinaryO,o OctalQ,qD,d Decimal'blank'H,h HexadecimalX,x1.4.19 .even DirectiveFormat:.evenThe .even directive ensures that the current location countercontains an even boundary value by adding 1 if the current loca-tion is odd.1.4.20 .odd DirectiveFormat:.oddThe .odd directive ensures that the current location countercontains an odd boundary value by adding one if the current lo-cation is even.THE ASSEMBLER PAGE 1-26GENERAL ASSEMBLER DIRECTIVES1.4.21 .bndry DirectiveFormat:.bndry nIf the current location is not an integer multiple of n thenthe location counter is increased to the next integer multipleof n.As an example:.bndry 4changes the current location to be at a multiple of 4, a 4-byteboundary.The relocation and/or concatenation of an area containing.bndry directives to place code at specific boundaries will NOTmaintain the specified boundaries. When relocating such codeareas you must specify the base addresses to the linker manuallyand/or you must pad the allocated space of an area to match theboundary conditions.As an example suppose you wish to link multiple assembledcode sections, each of which has code for the same area and re-quires a 4 byte boundary. The starting address of the area mustbe specified to the linker on a 4 byte boundary and each as-sembled code section must be padded to fill out the area in eachof the individually assembled files. The following code willprovide the necessary area padding to allow a succesful linkingof files and maintain the boundary requirements:.$.end = . ; end of area address.bndry 4 ; set boundary.if ne,. - .$.end ; is . the same ?. = . - 1 ; no: backup 1 byte.byte 0 ; place padding byte.endifIf all files are assembled simultaneously then only the.bndry directive is required at the beginning of the area ineach file and the initial area address must be specified to thelinker.THE ASSEMBLER PAGE 1-27GENERAL ASSEMBLER DIRECTIVES1.4.22 .area DirectiveFormat:.area name [(options)]where: name represents the symbolic name of the program sec-tion. This name may be the same as anyuser-defined symbol as the area namesare independent of all symbols and labels.options specify the type of program or data area:ABS absolute (automatically invokes OVR)REL relocatableOVR overlayCON concatenateNOPAG non-paged areaPAG paged areaThe .area directive provides a means of defining and separat-ing multiple programming and data sections. The name is thearea label used by the assembler and the linker to collect codefrom various separately assembled modules into one section. Thename may be from 1 to 79 characters in length.The options are specified within parenthesis and separated bycommas as shown in the following example:.area TEST (REL,CON) ;This section is relocatable;and concatenated with other;sections of this program area..area DATA (REL,OVR) ;This section is relocatable;and overlays other sections;of this program area..area SYS (ABS,OVR) ;(CON not allowed with ABS);This section is defined as;absolute. Absolute sections;are always overlayed with;other sections of this program;area.THE ASSEMBLER PAGE 1-28GENERAL ASSEMBLER DIRECTIVES.area PAGE (PAG) ;This is a paged section. The;section must be on a 256 byte;boundary and its length is;checked by the linker to be;no larger than 256 bytes.;This is useful for direct page;areas.The default area type is REL|CON; i.e. a relocatable sec-tion which is concatenated with other sections of code with thesame area name. The ABS option indicates an absolute area. TheOVR and CON options indicate if program sections of the samename will overlay each other (start at the same location) or beconcatenated with each other (appended to each other).Multiple invocations of the .area directive with the samename must specify the same options or leave the options fieldblank, this defaults to the previously specified options forthis program area.THE ASSEMBLER PAGE 1-29GENERAL ASSEMBLER DIRECTIVESThe ASxxxx assemblers automatically provide two programsections:'_CODE' This is the default code/data area.This program area is of type (REL,CON).The ASxxxx assemblers also automatically generate two symbolsfor each program area:'s_<area>' This is the starting address of the pro-gram area.'l_<area>' This is the length of the program area.The .area names and options are never case sensitive.1.4.24 .org DirectiveFormat:.org expwhere: exp is an absolute expression that becomes the cur-rent location counter.The .org directive is valid only in an absolute program sectionand will give a (q) error if used in a relocatable program area.The .org directive specifies that the current location counteris to become the specified absolute value.THE ASSEMBLER PAGE 1-31GENERAL ASSEMBLER DIRECTIVES1.4.25 .globl DirectiveFormat:.globl sym1,sym2,...,symnwhere: sym1, represent legal symbolic names.sym2,... When multiple symbols are specified,symn they are separated by commas.A .globl directive may also have a label field and/or a com-ment field.The .globl directive is provided to export (and thus providelinkage to) symbols not otherwise defined as global symbolswithin a module. In exporting global symbols the directive.globl J is similar to:J == expression or J::Because object modules are linked by global symbols, thesesymbols are vital to a program. All internal symbols appearingwithin a given program must be defined at the end of pass 1 orthey will be considered undefined. The assembly directive (-g)can be invoked to make all undefined symbols global at the endof pass 1.The .globl directive and == construct can be overridden by afollowing .local directive.NOTEThe ASxxxx assemblers use the last occurring symbolspecification in the source file(s) as the type shownin the symbol table and output to the .rel file.1.4.26 .local DirectiveFormat:.local sym1,sym2,...,symnwhere: sym1, represent legal symbolic names.sym2,... When multiple symbols are specified,symn they are separated by commas.A .local directive may also have a label field and/or a com-ment field.THE ASSEMBLER PAGE 1-32GENERAL ASSEMBLER DIRECTIVESThe .local directive is provided to define symbols that arelocal to the current assembly process. Local symbols are noteffected by the assembler option -a (make all symbols global).In defining local symbols the directive .local J is similar to:J =: expressionThe .local directive and the =: construct are useful in de-fining symbols and constants within a header or definition filethat contains many symbols specific to the current assembly pro-cess that should not be exported into the .rel output file. Atypical usage is in the definition of SFRs (Special FunctionRegisters) for a microprocessor.The .local directive and =: construct can be overridden by afollowing .globl directive.NOTEThe ASxxxx assemblers use the last occurring symbolspecification in the source file(s) as the type shownin the symbol table and output to the .rel file.1.4.27 .equ, .gblequ, and .lclequ DirectivesFormat:sym1 .equ expr ; equivalent to sym1 = exprsym2 .gblequ expr ; equivalent to sym2 == exprsym3 .lclequ expr ; equivalent to sym3 =: expror.equ sym1, expr ; equivalent to sym1 = expr.gblequ sym2, expr ; equivalent to sym2 == expr.lclequ sym3, expr ; equivalent to sym3 =: exprThese alternate forms of equivalence are provided for userconvenience.THE ASSEMBLER PAGE 1-33GENERAL ASSEMBLER DIRECTIVES1.4.28 .if, .else, and .endif DirectivesFormat:.if expr. ;}. ;} range of true condition. ;}.else. ;}. ;} range of false condition. ;}.endifThe conditional assembly directives allow you to include orexclude blocks of source code during the assembly process, basedon the evaluation of the test condition.The range of true condition will be processed if the expres-sion 'expr' is not zero (i.e. true) and the range of false con-dition will be processed if the expression 'expr' is zero (i.efalse). The range of true condition is optional as is the .elsedirective and the range of false condition. The following areall valid .if/.else/.endif constructions:.if A-4 ;evaluate A-4.byte 1,2 ;insert bytes if A-4 is.endif ;not zero.if K+3 ;evaluate K+3.else.byte 3,4 ;insert bytes if K+3.endif ;is zero.if J&3 ;evaluate J masked by 3.byte 12 ;insert this byte if J&3.else ;is not zero.byte 13 ;insert this byte if J&3.endif ;is zeroAll .if/.else/.endif directives are limited to a maximum nestingof 10 levels.The use of a .else directive outside a .if/.endif block willgenerate an (i) error. Assemblies having unequal .if and .endifcounts will cause an (i) error.THE ASSEMBLER PAGE 1-34GENERAL ASSEMBLER DIRECTIVES1.4.29 .iff, .ift, and .iftf DirectivesFormat:.if expr ;'if' range Condition is;TRUE when expr is not zero.ift ;}. ;} range of true condition ;}.iff ;} if. ;} range of false condition ;} block.iftf ;}. ;} unconditional range ;}.else ;'else' range Condition is;TRUE when expr is zero.ift ;}. ;} range of true condition ;}.iff ;} else. ;} range of false condition ;} block.iftf ;}. ;} unconditional range ;}.endifThe subconditional assembly directives may be placed withinconditional assembly blocks to indicate:1. The assembly of an alternate body of code whenthe condition of the block tests false.2. The assembly of non-contiguous body of codewithin the conditional assembly block,depending upon the result of the conditionaltest in entering the block.3. The unconditional assembly of a body of codewithin a conditional assembly block.The use of the .iff, .ift, and .iftf directives makes the use ofthe .else directive redundant.Note that the implementation of the .else directive causesthe .if tested condition to be complemented. The TRUE and FALSEconditions are determined by the .if/.else conditional state.All .if/.else/.endif directives are limited to a maximumnesting of 10 levels.The use of the .iff, .ift, or .iftf directives outside of aconditional block results in a (i) error code.THE ASSEMBLER PAGE 1-35GENERAL ASSEMBLER DIRECTIVESThe use of a .else directive outside a .if/.endif block willgenerate an (i) error. Assemblies having unequal .if and .endifcounts will cause an (i) error.1.4.30 .ifxx DirectivesAdditional conditional directives are available to test thevalue of an evaluated expression:.ifne expr ; true if expr != 0.ifeq expr ; true if expr == 0.ifgt expr ; true if expr > 0.iflt expr ; true if expr < 0.ifge expr ; true if expr >= 0.ifle expr ; true if expr <= 0Format:.ifxx expr. ;}. ;} range of true condition. ;}.else. ;}. ;} range of false condition. ;}.endifThe conditional assembly directives allow you to include orexclude blocks of source code during the assembly process, basedon the evaluation of the test condition.The range of true condition will be processed if the expres-sion 'expr' is not zero (i.e. true) and the range of false con-dition will be processed if the expression 'expr' is zero (i.efalse). The range of true condition is optional as is the .elsedirective and the range of false condition. The following areall valid .ifxx/.else/.endif constructions:.ifne A-4 ;evaluate A-4.byte 1,2 ;insert bytes if A-4 is.endif ;not zero.ifeq K+3 ;evaluate K+3.byte 3,4 ;insert bytes if K+3.endif ;is zero.ifne J&3 ;evaluate J masked by 3.byte 12 ;insert this byte if J&3.else ;is not zeroTHE ASSEMBLER PAGE 1-36GENERAL ASSEMBLER DIRECTIVES.byte 13 ;insert this byte if J&3.endif ;is zeroAll .if/.else/.endif directives are limited to a maximum nestingof 10 levels.The use of a .else directive outside a .if/.endif block willgenerate an (i) error. Assemblies having unequal .if and .endifcounts will cause an (i) error.1.4.31 .ifdef DirectiveFormat:.ifdef sym. ;}. ;} range of true condition. ;}.else. ;}. ;} range of false condition. ;}.endifThe conditional assembly directives allow you to include orexclude blocks of source code during the assembly process, basedon the evaluation of the test condition.The range of true condition will be processed if the symbol'sym' has been defined with a .define directive or 'sym' is avariable with an assigned value else the false range will beprocessed. The range of true condition is optional as is the.else directive and the range of false condition. The followingare all valid .ifdef/.else/.endif constructions:.ifdef sym$1 ;lookup symbol sym$1.byte 1,2 ;insert bytes if sym$1.endif ;is defined or;assigned a value.ifdef sym$2 ;lookup symbol sym$2.else.byte 3,4 ;insert bytes if sym$1.endif ;is not defined and;not assigned a value.ifdef sym$3 ;lookup symbol sym$3.byte 12 ;insert this byte if sym$3.else ;is defined/valued.byte 13 ;insert this byte if sym$3THE ASSEMBLER PAGE 1-37GENERAL ASSEMBLER DIRECTIVES.endif ;is not defined/valuedNote that the default assembler configuration of case sensitivemeans the testing for a defined symbol is also case sensitive.All .if/.else/.endif directives are limited to a maximumnesting of 10 levels.The use of a .else directive outside a .if/.endif block willgenerate an (i) error. Assemblies having unequal .if and .endifcounts will cause an (i) error.1.4.32 .ifndef DirectiveFormat:.ifndef sym. ;}. ;} range of true condition. ;}.else. ;}. ;} range of false condition. ;}.endifThe conditional assembly directives allow you to include orexclude blocks of source code during the assembly process, basedon the evaluation of the condition test.The range of true condition will be processed if the symbol'sym' is not defined by a .define directive and a variable 'sym'has not been assigned a value else the range of false conditionwill be processed. The range of true condition is optional asis the .else directive and the range of false condition. Thefollowing are all valid .ifndef/.else/.endif constructions:.ifndef sym$1 ;lookup symbol sym$1.byte 1,2 ;insert bytes if sym$1 is.endif ;not defined and;not assigned a value.ifndef sym$2 ;lookup symbol sym$2.else.byte 3,4 ;insert bytes if sym$1.endif ;is defined or;is assigned a value.ifndef sym$3 ;lookup symbol sym$3.byte 12 ;insert this byte if sym$3THE ASSEMBLER PAGE 1-38GENERAL ASSEMBLER DIRECTIVES.else ;is not defined/valued.byte 13 ;insert this byte if sym$3.endif ;is defined/valuedAll .if/.else/.endif directives are limited to a maximum nestingof 10 levels.The use of a .else directive outside a .if/.endif block willgenerate an (i) error. Assemblies having unequal .if and .endifcounts will cause an (i) error.1.4.33 .ifb DirectiveFormat:.ifb sym. ;}. ;} range of true condition. ;}.else. ;}. ;} range of false condition. ;}.endifThe conditional assembly directives allow you to include orexclude blocks of source code during the assembly process, basedon the evaluation of the test condition.The conditional .ifb is most useful when used in macro de-finitions to determine if the argument is blank. The range oftrue condition will be processed if the symbol 'sym' is blank.The range of true condition is optional as is the .else direc-tive and the range of false condition. The following are allvalid .ifb/.else/.endif constructions:.ifb sym$1 ;argument is not blank.byte 1,2 ;insert bytes if argument.endif ;is blank.ifb sym$2 ;argument is not blank.else.byte 3,4 ;insert bytes if argument.endif ;is not blank.ifb ;argument is blank.byte 12 ;insert this byte if.else ;argument is blank.byte 13 ;insert this byte if.endif ;argument not blankTHE ASSEMBLER PAGE 1-39GENERAL ASSEMBLER DIRECTIVESAll .if/.else/.endif directives are limited to a maximum nestingof 10 levels.The use of a .else directive outside a .if/.endif block willgenerate an (i) error. Assemblies having unequal .if and .endifcounts will cause an (i) error.1.4.34 .ifnb DirectiveFormat:.ifnb sym. ;}. ;} range of true condition. ;}.else. ;}. ;} range of false condition. ;}.endifThe conditional assembly directives allow you to include orexclude blocks of source code during the assembly process, basedon the evaluation of the test condition.The conditional .ifnb is most useful when used in macro de-finitions to determine if the argument is not blank. The rangeof true condition will be processed if the symbol 'sym' is notblank. The range of true condition is optional as is the .elsedirective and the range of false condition. The following areall valid .ifnb/.else/.endif constructions:.ifnb sym$1 ;argument is not blank.byte 1,2 ;insert bytes if argument.endif ;is not blank.ifnb sym$2 ;argument is not blank.else.byte 3,4 ;insert bytes if argument.endif ;is blank.ifnb ;argument is blank.byte 12 ;insert this byte if.else ;argument is not blank.byte 13 ;insert this byte if.endif ;argument is blankAll .if/.else/.endif directives are limited to a maximum nestingTHE ASSEMBLER PAGE 1-40GENERAL ASSEMBLER DIRECTIVESof 10 levels.The use of a .else directive outside a .if/.endif block willgenerate an (i) error. Assemblies having unequal .if and .endifcounts will cause an (i) error.1.4.35 .ifidn DirectiveFormat:.ifidn sym$1,sym$2. ;}. ;} range of true condition. ;}.else. ;}. ;} range of false condition. ;}.endifThe conditional assembly directives allow you to include orexclude blocks of source code during the assembly process, basedon the evaluation of the test condition.The conditional .ifidn is most useful when used in macro de-finitions to determine if the arguments are identical. Therange of true condition will be processed if the symbol 'sym$1'is idendical to 'sym$2' (i.e. the character strings for sym$1and sym$2 are the same consistent with the case sensitivityflag). When this if statement occurs inside a macro where anargument substitution may be blank then an argument should bedelimited with the form /symbol/ for each symbol. The range oftrue condition is optional as is the .else directive and therange of false condition. The following are all valid.ifidn/.else/.endif constructions:.ifidn sym$1,sym$1 ;arguments are the same.byte 1,2 ;insert bytes if arguments.endif ;are the sane.ifidn sym$1,sym$2 ;arguments are not the same.else.byte 3,4 ;insert bytes if arguments.endif ;are not the same.ifidn sym$3,sym$3 ;arguments are the same.byte 12 ;insert this byte if.else ;arguments are the same.byte 13 ;insert this byte if.endif ;arguments are not the sameTHE ASSEMBLER PAGE 1-41GENERAL ASSEMBLER DIRECTIVESAll .if/.else/.endif directives are limited to a maximum nestingof 10 levels.The use of a .else directive outside a .if/.endif block willgenerate an (i) error. Assemblies having unequal .if and .endifcounts will cause an (i) error.1.4.36 .ifdif DirectiveFormat:.ifdif sym$1,sym$2. ;}. ;} range of true condition. ;}.else. ;}. ;} range of false condition. ;}.endifThe conditional assembly directives allow you to include orexclude blocks of source code during the assembly process, basedon the evaluation of the test condition.The conditional .ifdif is most useful when used in macro de-finitions to determine if the arguments are different. Therange of true condition will be processed if the symbol 'sym$1'is different from 'sym$2' (i.e. the character strings for sym$1and sym$2 are the not the same consistent with the case sensi-tivity flag). When this if statement occurs inside a macrowhere an argument substitution may be blank then an argumentshould be delimited with the form /symbol/ for each symbol. Therange of true condition is optional as is the .else directiveand the range of false condition. The following are all valid.ifdif/.else/.endif constructions:.ifdif sym$1,sym$2 ;arguments are different.byte 1,2 ;insert bytes if arguments.endif ;are different.ifdif sym$1,sym$1 ;arguments are identical.else.byte 3,4 ;insert bytes if arguments.endif ;are different.ifdif sym$1,sym$3 ;arguments are different.byte 12 ;insert this byte if.else ;arguments are differentTHE ASSEMBLER PAGE 1-42GENERAL ASSEMBLER DIRECTIVES.byte 13 ;insert this byte if.endif ;arguments are identicalAll .if/.else/.endif directives are limited to a maximum nestingof 10 levels.The use of a .else directive outside a .if/.endif block willgenerate an (i) error. Assemblies having unequal .if and .endifcounts will cause an (i) error.1.4.37 Alternate .if Directive FormsFormat:.if cnd(,) arg1(, arg2)where the cnd (followed by an optional comma) may be any ofthe following:-------------------------------------------------------condition Assemble(complement) Args Block if:-------------------------------------------------------eq ( ne ) expr equal to zero(not equal to zero)gt ( le ) expr greater than zero(less than or equal to zero)lt ( ge ) expr less than zero(greater than or equal to zero)def ( ndef ) symbol .define'd or user set(not .define'd or user set)b ( nb ) macro argument presentsymbol (argument not present)idn ( dif ) macro arguments identicalsymbol (arguments not identical)f ( t ) ----- only within a .if/.else/.endifconditional blocktf ----- only within a .if/.else/.endifconditional blockAll .if/.else/.endif directives are limited to a maximum nestingTHE ASSEMBLER PAGE 1-43GENERAL ASSEMBLER DIRECTIVESof 10 levels.The use of a .else directive outside a .if/.endif block willgenerate an (i) error. Assemblies having unequal .if and .endifcounts will cause an (i) error.1.4.38 Immediate Conditional Assembly DirectivesThe immediate conditional assembly directives allow a singleline of code to be assembled without using a .if/.else/.endifconstruct. All of the previously described conditionals haveimmediate equivalents.Format:.iif arg(,) line_to_assemble.iifeq arg(,) line_to_assemble.iifne arg(,) line_to_assemble.iifgt arg(,) line_to_assemble.iifle arg(,) line_to_assemble.iifge arg(,) line_to_assemble.iiflt arg(,) line_to_assemble.iifdef arg(,) line_to_assemble.iifndef arg(,) line_to_assemble.iifb (,)arg(,) line_to_assemble.iifnb (,)arg(,) line_to_assemble.iifidn (,)arg1,arg2(,) line_to_assemble.iifdif (,)arg1,arg2(,) line_to_assemble.iiff line_to_assemble.iift line_to_assemble.iiftf line_to_assembleAlternate Format:.iif arg(,) line_to_assemble.iif eq arg(,) line_to_assemble.iif ne arg(,) line_to_assemble.iif gt arg(,) line_to_assemble.iif le arg(,) line_to_assemble.iif ge arg(,) line_to_assemble.iif lt arg(,) line_to_assemble.iif def arg(,) line_to_assemble.iif ndef arg(,) line_to_assemble.iif b (,)arg(,) line_to_assemble.iif nb (,)arg(,) line_to_assemble.iif idn (,)arg1,arg2(,) line_to_assembleTHE ASSEMBLER PAGE 1-44GENERAL ASSEMBLER DIRECTIVES.iif dif (,)arg1,arg2(,) line_to_assemble.iiff line_to_assemble.iift line_to_assemble.iiftf line_to_assembleThe (,) indicates an optional comma.The .iif types b, n, idn, and dif require the commas if theargument(s) may be blank. These commas may be removed if thearguments are delimited with the form ^/symbol/ for each symbol.The immediate conditional directives donot change the.if/.else/.endif nesting level.1.4.39 .include DirectiveFormat:.include /string/ or.include ^/string/where: string represents a string that is the file specifica-tion of an ASxxxx source file./ / represent the delimiting characters. Thesedelimiters may be any paired printingcharacters, as long as the characters are notcontained within the string itself. If thedelimiting characters do not match, the .includedirective will give the (q) error.The .include directive is used to insert a source file withinthe source file currently being assembled. When this directiveis encountered, an implicit .page directive is issued. When theend of the specified source file is reached, an implicit .pagedirective is issued and input continues from the previous sourcefile. The maximum nesting level of source files specified by a.include directive is five.The total number of separately specified .include files isunlimited as each .include file is opened and then closed duringeach pass made by the assembler.The default directory path, if none is specified, for any.include file is the directory path of the current file. Forexample: if the current source file, D:\proj\file1.asm,THE ASSEMBLER PAGE 1-45GENERAL ASSEMBLER DIRECTIVESincludes a file specified as "include1" then the fileD:\proj\include1.asm is opened.THE ASSEMBLER PAGE 1-46GENERAL ASSEMBLER DIRECTIVES1.4.41 .setdp DirectiveFormat:.setdp [base [,area]]The set direct page directive has a common format in all the as-semblers supporting a paged mode. The .setdp directive is usedto inform the assembler of the current direct page region andthe offset address within the selected area. The normal invoca-tion methods are:.area DIRECT (PAG).setdpor.setdp 0,DIRECTfor all the 68xx microprocessors (the 6804 has only the pagedram area). The commands specify that the direct page is in areaDIRECT and its offset address is 0 (the only valid value for allbut the 6809 microprocessor). Be sure to place the DIRECT areaat address 0 during linking. When the base address and area arenot specified, then zero and the current area are the defaults.If a .setdp directive is not issued the assembler defaults thedirect page to the area "_CODE" at offset 0.The assembler verifies that any local variable used in adirect variable reference is located in this area. Local vari-able and constant value direct access addresses are checked tobe within the address range from 0 to 255.External direct references are assumed by the assembler to bein the correct area and have valid offsets. The linker willcheck all direct page relocations to verify that they are withinthe correct area.The 6809 microprocessor allows the selection of the directpage to be on any 256 byte boundary by loading the appropriatevalue into the dp register. Typically one would like to selectthe page boundary at link time, one method follows:THE ASSEMBLER PAGE 1-47GENERAL ASSEMBLER DIRECTIVES.area DIRECT (PAG) ; define the direct page.setdp....area PROGRAM.ldd #DIRECT ; load the direct page registertfr a,dp ; for access to the direct pageAt link time specify the base and global equates to locate thedirect page:-b DIRECT = 0x1000-g DIRECT = 0x1000Both the area address and offset value must be specified (areaand variable names are independent). The linker will verifythat the relocated direct page accesses are within the directpage.The preceeding sequence could be repeated for multiple pagedareas, however an alternate method is to define a non-paged areaand use the .setdp directive to specify the offset value:.area DIRECT ; define non-paged area....area PROGRAM..setdp 0,DIRECT ; direct page arealdd #DIRECT ; load the direct page registertfr a,dp ; for access to the direct page...setdp 0x100,DIRECT ; direct page arealdd #DIRECT+0x100 ; load the direct page registertfr a,dp ; for access to the direct pageThe linker will verify that subsequent direct page referencesare in the specified area and offset address range. It is theprogrammers responsibility to load the dp register with the cor-rect page segment corresponding to the .setdp base addressspecified.For those cases where a single piece of code must access adefined data structure within a direct page and there are manypages, define a dumby direct page linked at address 0. Thisdumby page is used only to define the variable labels. Thenload the dp register with the real base address but donot use a.setdp directive. This method is equivalent to indexedTHE ASSEMBLER PAGE 1-48GENERAL ASSEMBLER DIRECTIVESaddressing, where the dp register is the index register and thedirect addressing is the offset.1.4.42 .16bit, .24bit, and .32bit DirectivesFormat:.16bit ;specify 16-bit addressing.24bit ;specify 24-bit addressing.32bit ;specify 32-bit addressingThe .16bit, .24bit, and .32bit directives are special direc-tives for assembler configuration when default values are notused.1.5 INVOKING ASXXXXStarting an ASxxxx assembler without any arguments providesthe following option list and then exits:Usage: [-Options] fileUsage: [-Options] outfile file1 [file2 file3 ...]-d Decimal listing-q Octal listing-x Hex listing (default)-g Undefined symbols made global-a All user symbols made global-b Display .define substitutions in listing-bb and display without .define substitutions-c Disable instruction cycle count in listing-j Enable NoICE Debug Symbols-y Enable SDCC Debug Symbols-l Create list output (out)file[.lst]-o Create object output (out)file[.rel]-s Create symbol output (out)file[.sym]-p Disable listing pagination-u Disable .list/.nlist processing-w Wide listing format for symbol table-z Disable case sensitivity for symbols-f Flag relocatable references by ` in listing file-ff Flag relocatable references by mode in listing fileThe ASxxxx assemblers are command line oriented. Most sytemsrequire the option(s) and file(s) arguments to follow the ASxxxxassembler name:as6809 -[Options] fileas6809 [-Options] outfile file1 [file2 ...]Some systems may request the arguments after the assembler isstarted at a system specific prompt:as6809argv: -[Options] fileas6809argv: [-Options] outfile file1 [file2 ...]The ASxxxx options in some more detail:-d decimal listingTHE ASSEMBLER PAGE 1-51INVOKING ASXXXX-q octal listing-x hex listing (default)The listing radix affects the.lst, .rel, and .sym files.-g undefined symbols made globalUnresolved (external) variablesand symbols are flagged as global.-a all user symbols made globalAll defined (not local or external)variables and symbols are flaggedas global.-b display .define substitutions in listingIf a .define substitution has been appliedto an assembler source line the sourceline is printed with the substitution.-bb and display without .define substitutionsIf a .define substitution has been appliedto an assembler source line the sourceline is first printed without substitutionfollowed by the line with the substitution.-c Disable instruction cycle count in listingThis option overrides the listing option'cyc' in the .list and .nlist directives.Instruction cycle counts cannot be enabledif the -c option is specified.-j enable NOICE debug symbols-y enable SDCC debug symbols-l create list output (out)file.lstIf -s (symbol table output) is notspecified the symbol table is includedat the end of the listing file.-o create object output (out)file.rel-s create symbol output (out)file.sym-p disable listing paginationThis option inhibits the generationTHE ASSEMBLER PAGE 1-52INVOKING ASXXXXof a form-feed character and itsassociated page header in theassembler listing.-u disable .list/.nlist processingThis option disables all .list and.nlist directives. The listing modeis .list with the options err, loc,bin, eqt, cyc, lin, src, pag, lst,and md. The options cyc and pag areoverridden by the -c and -p commandline options.-w wide listing format for symbol table-z disable case sensitivity for symbols-f by ` in the listing file-ff by mode in the listing fileRelocatable modess are flagged by byteposition (LSB, Byte 2, Byte 3, MSB)*nMN paged,uvUV unsigned,rsRS signed,pqPQ program counter relative.asx8051 specific command line option:-I<dir> Add the named directory to the include filesearch path. This option may be used more than once.Directories are searched in the order given.The file name for the .lst, .rel, and .sym files is the firstfile name specified in the command line. All output files areascii text files which may be edited, copied, etc. The outputfiles are the concatenation of all the input files, if files areto be assembled independently invoke the assembler for eachfile.The .rel file contains a radix directive so that the linkerwill use the proper conversion for this file. Linked files mayhave different radices.ASXXXX assemblers supported by and distributed with SDCC are:sdas390 (Dallas 80390)sdas6808 (Motorola 68HC08)sdas8051 (Intel 8051)sdasgb (GameBoy Z80-like CPU)sdasrab (Rabbit Z80-like CPU)sdasz80 (Zilog Z80 / Hitachi HD64180)1.6 ERRORSThe ASxxxx assemblers provide limited diagnostic error codesduring the assembly process, these errors will be noted in thelisting file and printed on the stderr device.The assembler reports the errors on the stderr device as?ASxxxx-Error-<*> in line nnn of filenamewhere * is the error code, nnn is the line number, and filenameTHE ASSEMBLER PAGE 1-53ERRORSis the source/include file.The errors are:(.) This error is caused by an absolute direct assign-ment of the current location counter. = expression (incorrect)rather than the correct. = . + expression(a) Indicates a machine specific addressing or address-ing mode error.(b) Indicates a direct page boundary error.(d) Indicates a direct page addressing error.(i) Caused by an .include file error or an .if/.endifmismatch.(m) Multiple definitions of the same label, multiple.module directives, multiple conflicting attributesin an .area directive.(n) An .mexit, .endm, or .narg directive outside of amacro, repeat block or indefinite repeat block.(o) Directive or mnemonic error or the use of the .orgdirective in a relocatable area.(p) Phase error: label location changing between passes2 and 3. Normally caused by having more than onelevel of forward referencing.(q) Questionable syntax: missing or improper operators,terminators, or delimiters.(r) Relocation error: logic operation attempted on arelocatable term, addition of two relocatable terms,subtraction of two relocatable terms not within thesame programming area or external symbols.(s) String Substitution / recursion error.(u) Undefined symbol encountered during assembly.(z) Divide by 0 or Modulus by 0 error: result is 0.THE ASSEMBLER PAGE 1-54LISTING FILE1.7 LISTING FILEThe (-l) option produces an ascii output listing file. Eachpage of output contains a five line header:1. The ASxxxx program name and page number2. Assembler Radix and Address Bits3. Title from a .title directive (if any)4. Subtitle from a .sbttl directive (if any)5. Blank lineEach succeeding line contains six fields:1. Error field (first two characters of line)2. Current location counter3. Generated code in byte format4. Opcode cycles count5. Source text line number6. Source textThe error field may contain upto 2 error flags indicating anyerrors encountered while assembling this line of source code.The current location counter field displays the 16-bit,24-bit, or 32-bit program position. This field will be in theselected radix.The generated code follows the program location. The listingradix determines the number of bytes that will be displayed inthis field. Hexadecimal listing allows six bytes of data withinthe field, decimal and octal allow four bytes within the field.If more than one field of data is generated from the assembly ofa single line of source code, then the data field is repeated onsuccessive lines.The opcode cycles count is printed within the delimiters [ ]on the line with the source text. This reduces the number ofTHE ASSEMBLER PAGE 1-55LISTING FILEgenerated code bytes displayed on the line with the source list-ing by one. (The -c option disables all opcode cycle listing.)The source text line number is printed in decimal and is fol-lowed by the source text. A Source line with a .page directiveis never listed. (The -u option overrides this behavior.)Two additional options are available for printing the sourceline text. If the -b option is specified then the listed sourceline contains all the .define substitutions. If the -bb optionis specified then the original source line is printed before thesource line with substitutions.Two data field options are available to flag those byteswhich will be relocated by the linker. If the -f option isspecified then each byte to be relocated will be preceeded bythe '`' character. If the -ff option is specified then eachbyte to be relocated will be preceeded by one of the followingcharacters:1. * paged relocation2. u low byte of unsigned word or unsigned byte3. v high byte of unsigned word4. p PCR low byte of word relocation or PCR byte5. q PCR high byte of word relocation6. r low byte relocation or byte relocation7. s high byte relocationAssemblers which use 24-bit or 32-bit addressing use an ex-tended flagging mode:1. * paged relocation2. u 1st byte of unsigned value3. v 2nd byte of unsigned value4. U 3rd byte of unsigned value5. V 4th byte of unsigned value6. p PCR 1st byte of relocation value or PCR byte7. q PCR 2nd byte of relocation valueTHE ASSEMBLER PAGE 1-56LISTING FILE8. P PCR 3rd byte of relocation value9. Q PCR 4th byte of relocation value10. r 1st byte of relocation value or byte relocation11. s 2nd byte of relocation value12. R 3rd byte of relocation value13. S 4th byte of relocation value1.8 SYMBOL TABLE FILEThe symbol table has two parts:1. The alphabetically sorted list of symbols and/or labelsdefined or referenced in the source program.2. A list of the program areas defined during assembly ofthe source program.The sorted list of symbols and/or labels contains the follow-ing information:1. Program area number (none if absolute value or exter-nal)2. The symbol or label3. Directly assigned symbol is denoted with an (=) sign4. The value of a symbol, location of a label relative tothe program area base address (=0), or a **** indicat-ing the symbol or label is undefined.5. The characters: G - global, L - local,R - relocatable, and X - external.The list of program areas provides the correspondence betweenthe program area numbers and the defined program areas, the sizeof the program areas, and the area flags (attributes).THE ASSEMBLER PAGE 1-57OBJECT FILE1.9 OBJECT FILEThe object file is an ascii file containing the informationneeded by the linker to bind multiple object modules into a com-plete loadable memory image. The object module contains thefollowing designators:[XDQ][HL][234]X Hexadecimal radixD Decimal radixQ Octal radixH Most significant byte firstL Least significant byte first2 16-Bit Addressing3 24-Bit Addressing4 32-Bit AddressingH HeaderM ModuleA AreaS SymbolT Object codeR Relocation informationP Paging informationRefer to the linker for a detailed description of each of thedesignators and the format of the information contained in theobject file.CHAPTER 2THE MACRO PROCESSOR2.1 DEFINING MACROSBy using macros a programmer can use a single line to inserta sequence of lines into a source program.A macro definition is headed by a .macro directive followedby the source lines. The source lines may optionally containdummy arguments. If such arguments are used, each one is listedin the .macro directive.A macro call is the statement used by the programmer to callthe macro source program. It consists of the macro name fol-lowed by the real arguments needed to replace the dummy argu-ments used in the macro.Macro expansion is the insertion of the macro source linesinto the main program. Included in this insertion is thereplacement of the dummy arguments by the real arguments.Macro directives provide a means to manipulate the macro ex-pansions. Only one directive is allowed per source line. Eachdirective may have a blank operand field or one or moreoperands. Legal operands differ with each directive. Themacros and their associated directives are detailed in thischapter.Macro directives can replace any machine dependent mnemonicassociated with a specific assembler. However, the basic assem-bler directives cannot be replaced with a macro.THE MACRO PROCESSOR PAGE 2-2DEFINING MACROS2.1.1 .macro DirectiveFormat:[label:] .macro name, dummy argument listwhere: label represents an optional statement label.name represents the user-assigned symbolicname of the macro. This name may beany legal symbol and may be used as alabel elsewhere in the program. Themacro name is not case sensitive,name, NAME, or nAmE all refer to thesame macro., represents a legal macro separator(comma, space, and/or tab).dummy represents a number of legal symbolsargument that may appear anywhere in the body oflist the macro definition, even as a label.These dummy symbols can be used elsewherein the program with no conflict ofdefinition. Multiple dummy argumentsspecified in this directive may beseparated by any legal separator. Thedetection of a duplicate or an illegalsymbol in a dummy argument listterminates the scan and causes a 'q'error to be generated.A comment may follow the dummy argument list in a .macro direc-tive, as shown below:.macro abs a,b ;Defines macro absThe first statement of a macro definition must be a .macrodirective. Defining a macro with the same name as an existingmacro will generate an 'm' error. The .mdelete directive shouldbe used to delete the previous macro definition before redefin-ing a macro.THE MACRO PROCESSOR PAGE 2-3DEFINING MACROS2.1.2 .endm DirectiveFormat:.endmThe .endm directive should not have a label. Because the direc-tives .irp, .irpc, and .rept may repeat more than once the labelwill be defined multiple times resulting in 'm' and/or 'p' er-rors.The .endm directive may be followed by a comment field, asshown below:.endm ;end of macroA comment may follow the dummy argument list in a .macrodirective, as shown below:.macro typemsg message ;Type a message.jsr typemsg.word message.endm ;End of typemsgThe final statement of every macro definition must be a .endmdirective. The .endm directive is also used to terminate inde-finite repeat blocks and repeat blocks. A .endm directive en-countered outside a macro definition is flagged with an 'n'error.2.1.3 .mexit DirectiveFormat:.mexitThe .mexit directive may be used to terminate a macro expansionbefore the end of the macro is encountered. This directive isalso legal within repeat blocks. It is most useful in nestedmacros. The .mexit directive terminates the current macro asthough a .endm directive had been encountered. Using the .mexitdirective bypasses the complexities of nested conditional direc-tives and alternate assembly paths, as shown in the followingexample:THE MACRO PROCESSOR PAGE 2-4DEFINING MACROS.macro altr N,A,B....if eq,N ;Start conditional Block....mexit ;Terminate macro expansion.endif ;End of conditional block....endm ;Normal end of macroIn an assembly where the symbol N is replaced by zero, the.mexit directive would assemble the conditional block and ter-minate the macro expansion. When macros ar nested, a .mexitdirective causes an exit to the next higher level of macro ex-pansion. A .mexit directive encountered outside a macro defini-tion is flagged with an 'n' error.2.2 CALLING MACROSFormat:[label:] name real argumentswhere: label represents an optional statement label.name represents the name of the macro, asspecified in the macro definition.real represent symbolic arguments whicharguments replace the dummy arguments listedin the .macro definition. Whenmultiple arguments occur, they areseparated by any legal separator.Arguments to the macro call aretreated as character strings, theirusage is determined by the macrodefinition.A macro definition must be established by means of the .macrodirective before the macro can be called and expanded within thesource program.When a macro name is the same as a user label, the appearanceof the symbol in the operator field designates the symbol as aTHE MACRO PROCESSOR PAGE 2-5CALLING MACROSmacro call; the appearance of the symbol in the operand fielddesignates it as a label, as shown below:LESS: mov @r0,r1 ;LESS is a label...bra LESS ;LESS is considered a label...LESS sym1,sym2 ;LESS is a macro call2.3 ARGUMENTS IN MACRO DEFINITIONS AND MACRO CALLSMultiple arguments within a macro must be separated by one ofthe legal separating characters (comma, space, and/or tab).Macro definition arguments (dummy) and macro call arguments(real) maintain a strict positional relationship. That is, thefirst real argument in a macro call corresponds with the firstdummy argument in the macro definition.For example, the following macro definition and its asso-ciated macro call contain multiple arguments:.macro new a,b,c...new phi,sig,^/C1,C2/Arguments which themselves contain separating characters must beenclosed within the delimiter construct ^/ / where thecharacter '/' may be any character not in the argument string.For example, the macro call:new ^/exg x,y/,#44,ijcauses the entire expressionexg x,yto replace all occurrances of the symbol a in the macro defini-tion. Real arguments with a macro call are considered to becharacter strings and are treated as a single entity duringmacro expansion.THE MACRO PROCESSOR PAGE 2-6ARGUMENTS IN MACRO DEFINITIONS AND MACRO CALLSThe up-arrow (^) construction also allows another up-arrowcostruction to be passed as part of the argument. This con-struction, for example, could have been used in the above macrocall, as follows:new ^!^/exg x,y/!,#44,ijcausing the entire string ^/exg x,y/ to be passed as an argu-ment.2.3.1 Macro NestingMacro nesting occurs where the expansion of one macro in-cludes a call to another macro. The depth of nesting is arbi-trarily limited to 20.To pass an argument containing legal argument delimiters tonested macros, enclose the argument in the macro definitionwithin an up-arrow construction, as shown in the coding examplebelow. This extra set of delimiters for each level of nestingis required in the macro definition, not the in the macro call..macro level1 dum1,dum2level2 ^/dum1/level2 ^/dum2/.endm.macro level2 dum3dum3add #10,zpush z.endmA call to the level1 macro, as shown below, for example:level1 ^/leaz 0,x/,^/tfr x,z/causes the following macro expansion to occur:leaz 0,xadd #10,zpush ztfr x,zadd #10,zpush zWhen macro definitions are nested, the inner definition cannotbe called until the outer macro has been called and expanded.For example, in the following code:THE MACRO PROCESSOR PAGE 2-7ARGUMENTS IN MACRO DEFINITIONS AND MACRO CALLS.macro lv1 a,b....macro lv2 c....endm.endmthe lv2 macro cannot be called and expanded until the lv1 macrohas been expanded. Likewise, any macro defined within the lv2macro definition cannot be called and expanded until lv2 hasalso been expanded.2.3.2 Special Characters in Macro ArgumentsIf an argument does not contain spaces, tabs, or commas itmay include special characters without enclosing them in adelimited construction. For example:.macro push argmov arg,-(sp).endmpush x+3(%2)causes the following code to be generated:mov x+3(%2),-(sp)2.3.3 Passing Numerical Arguments as SymbolsIf the unary operator backslash (\) precedes an argument, themacro treats the argument as a numeric value in the current pro-gram radix. The ascii characters representing this value areinserted in the macro expansion, and their function is definedin the context of the resulting code, as shown in the followingexample:THE MACRO PROCESSOR PAGE 2-8ARGUMENTS IN MACRO DEFINITIONS AND MACRO CALLS.macro inc a,bcon a,\bb = b + 1.endm.macro con a,ba'b: .word 4.endm...c = 0 ;Initializeinc x,cThe above macro call (inc) would thus expand to:x0: .word 4In this expanded code, the lable x0: results from the con-catenation of two real arguments. The single quote (')character in the label a'b: concatenates the real argument xand 0 as they are passed during the expansion of the macro.This type of argument construction is descibed in more detail ina following section.A subsequent call to the same macro would generate the fol-lowing code:x1: .word 4and so on, for later calls. The two macro definitions arenecessary because the symbol associated with the dummy argumentb (that is, symbol c) cannot be updated in the con macro defini-tion, because the character 0 has replaced c in the argumentstring (inc x,c). In the con macro definition, the numberpassed is treated as a string argument. (Where the value of thereal argument is 0, only a single 0 character is passed to themacro expansion.THE MACRO PROCESSOR PAGE 2-9ARGUMENTS IN MACRO DEFINITIONS AND MACRO CALLS2.3.4 Number of Arguments in Macro CallsA macro can be defined with or without arguments. If morearguments appear in the macro call than in the macro definition,a 'q' error is generated. If fewer arguments appear in themacro call than in the macro definition, missing arguments areassumed to be null values. The conditional directives .if b and.if nb can be used within the macro to detect missing arguments.The number of arguments can be determined using the .narg direc-tive.2.3.5 Creating Local Symbols AutomaticallyA label is often required in an expanded macro. In the con-ventional macro facilituies thus far described, a label must beexplicitly specified as an argument with each macro call. Theuser must be careful in issuing subsequent calls to the samemacro in order avoid duplicating labels. This concern can beeliminated through a feature of the ASxxxx macro facility thatcreates a unique symbol where a label is required in an expandedmacro.ASxxxx allows temporary symbols of the form n$, where n is adecimal integer. Automatically created symbols are created innumerical order beginning at 10000$.The automatic generation of local symbols is invoked on eachcall of a macro whose definition contains a dummy argument pre-ceded by the question mark (?) character, as shown in the macrodefinition below:.macro beta a,?b ;dummy argument b with ?tst abeq badd #5,ab:.endmA local symbol is created automatically only when a real ar-gument of the macro call is either null or missing, as shown inExample 1 below. If the real argument is specified in the macrocall, however, generation of the local symbol is inhibited andnormal argument replacement occurs, as shown in Example 2 below.(Examples 1 and 2 are both expansions of the beta macro definedabove.)THE MACRO PROCESSOR PAGE 2-10ARGUMENTS IN MACRO DEFINITIONS AND MACRO CALLSExample 1: Create a Local Symbol for the Missing Argumentbeta flag ;Second argument is missing.tst flagbeq 10000$ ;Local symbol is created.add #5,flag10000$:Example 2: Do Not Create a Local Symbolbeta r3,xyztst r3beq xyzadd #5,r3xyz:Automatically created local symbols resulting from the expan-sion of a macro, as described above, do not establish a localsymbol block in their own right.When a macro has several arguments earmarked for automaticlocal symbol generation, substituting a specific label for onesuch argument risks assembly errors because the arguments areconstructed at the point of macro invocation. Therefor, the ap-pearance of a label in the macro expansion will create a new lo-cal symbol block. The new local symbol block could leave localsymbol references in the previous block and their symbol defini-tions in the new one, causing error codes in the assembly list-ing. Furthermore a later macro expansion that creates localsymbols in the new block may duplicate one of the symbols inquestion, causing an additional error code 'p' in the assemblylisting.2.3.6 Concatenation of Macro ArgumentsThe apostrophe or single quote character (') operates as alegal delimiting character in macro definitions. A single quotethat precedes and/or follows a dummy argument in a macro defini-tion is removed, and the substitution of the real argument oc-curs at that point. For example, in the following statements:.macro def A,B,CA'B: asciz "C".byte ''A,''B.endmwhen the macro def is called through the statement:THE MACRO PROCESSOR PAGE 2-11ARGUMENTS IN MACRO DEFINITIONS AND MACRO CALLSdef x,y,^/V05.00/it is expanded, as follows:xy: asciz "V05.00".byte 'x,'yIn expanding the first line, the scan for the first argumentterminates upon finding the first apostrophe (') character.Since A is a dummy argument, the apostrphe (') is removed. Thescan then resumes with B; B is also noted as another dummy ar-gument. The two real arguments x and y are then concated toform the label xy:. The third dummy argument is noted in theoperand field of the .asciz directive, causing the real argumentV05.00 to be substituted in this field.When evaluating the arguments of the .byte directive duringexpansion of the second line, the scan begins with the firstapostrophe (') character. Since it is neither preceded nor fol-lowed by a dummy argument, this apostrophe remains in the macroexpansion. The scan then encounters the second apostrophe,which is followed by a dummy argument and is therefor discarded.The scan of argument A is terminated upon encountering the comma(,). The third apostrophe is neither preceded nor followed by adummy argument and again remains in the macro expansion. Thefourth (and last) apostrophe is followed by another dummy argu-ment and is likewise discarded. (Four apostrophe (') characterswere necessary in the macro definition to generate two apos-trophe (') characters in the macro expansion.)2.4 MACRO ATTRIBUTE DIRECTIVESThe ASxxxx assemblers have four directives that allow theuser to determine certain attributes of macro arguments: .narg,.nchr, .ntyp, and .nval. The use of these directives permitsselective modifications of a macro expansion, depending on thenature of the arguments being passed. These directives aredescribed below.THE MACRO PROCESSOR PAGE 2-12MACRO ATTRIBUTE DIRECTIVES2.4.1 .narg DirectiveFormat:[label:] .narg symbolwhere: label represents an optional statement label.symbol represents any legal symbol. This symbolis equated to the number of arguments inthe macro call currently being expanded.If a symbol is not specified, the .nargdirective is flagged with a 'q' error.The .narg directive is used to determine the number of argumentsin the macro call currently being expanded. Hence, the .nargdirective can appear only within a macro definition; if it ap-pears elsewhere, an 'n' error is generated.The argument count includes null arguments as shown in thefollowing:.macro pack A,B,C.narg cnt....endmpack arg1,,arg3pack arg1When the first macro pack is invoked .narg will assign a valueof three (3) to the number of arguments cnt, which includes theempty argument. The second invocation of macro pack has only asingle argument specified and .narg will assign a value of one(1) to cnt.THE MACRO PROCESSOR PAGE 2-13MACRO ATTRIBUTE DIRECTIVES2.4.2 .nchr DirectiveFormat:[label:] .nchr symbol,stringwhere: label represents an optional statement label.symbol represents any legal symbol. This symbolis equated to the number of characters inthe string of the macro call currentlybeing expanded. If a symbol is notspecified, the .nchr directive isflagged with a 'q' error., represents any legal separator (comma,space, and/or tab).string represents a string of printable 7-bitascii characters. If the characterstring contains a legal separator(comma, space and/or tab) the wholestring must be delimited using theup-arrow (^) construct ^/ /.If the delimiting characters do notmatch or if the ending delimitercannot be detected because of asyntactical error in the characterstring, the .nchr directive reportsa 'q' error.The .nchr directive, which can appear anywhere in an ASxxxx pro-gram, is used to determine the number of characters in a speci-fied character string. This directive is useful in calculatingthe length of macro arguments.THE MACRO PROCESSOR PAGE 2-14MACRO ATTRIBUTE DIRECTIVES2.4.3 .ntyp DirectiveFormat:[label:] .ntyp symbol,argwhere: label represents an optional statement label.symbol represents any legal symbol. The symbolis made absolute and equated to 0 ifarg is an absolute value or a nonrelocatable symbol. The symbol is madeabsolute and equated to 1 if arg is arelocatable symbol. If a symbol is notspecified then the .ntyp directive isflagged with a 'q' error., represents any legal separator (comma,space, and/or tab).arg represents any legal expression orsymbol. If arg is not specifiedthen the .ntyp directive is flaggedwith a 'q' error.The .ntyp directive, which can appear anywhere in an ASxxxx pro-gram, is used to determine the symbol or expression type as ab-solute (0) or relocatable (1).2.4.4 .nval DirectiveFormat:[label:] .nval symbol,argwhere: label represents an optional statement label.symbol represents any legal symbol. The symbolis equated to the value of arg and madeabsolute. If a symbol is not specifiedthen the .nval directive is flaggedwith a 'q' error., represents any legal separator (comma,space, and/or tab).arg represents any legal expression orsymbol. If arg is not specifiedthen the .nval directive is flaggedTHE MACRO PROCESSOR PAGE 2-15MACRO ATTRIBUTE DIRECTIVESwith a 'q' error.The .nval directive, which can appear anywhere in an ASxxxx pro-gram, is used to determine the value of arg and make the resultan absolute value.2.5 INDEFINITE REPEAT BLOCK DIRECTIVESAn indefinite repeat block is similar to a macro definitionwith only one dummy argument. At each expansion of the inde-finite repeat range, this dummy argument is replaced with suc-cessive elements of a real argument list. Since the repeatdirective and its associated range are coded in-line within thesource program, this type of macro definition and expansion doesnot require calling the macro by name, as required in the expan-sion of the conventional macros previously described.An indefinite repeat block can appear within or outsideanother macro definition, indefinite repeat block, or repeatblock. The rules specifying indefinite repeat block argumentsare the same as for specifying macro arguments.THE MACRO PROCESSOR PAGE 2-16INDEFINITE REPEAT BLOCK DIRECTIVES2.5.1 .irp DirectiveFormat:[label:] .irp sym,argument_list..(range of indefinite repeat block)...endmwhere: label represents an optional statement label.sym represents a dummy argument that isreplaced with successive real argumentsfrom the argument list. If the dummyargument is not specified, the .irpdirective is flagged with a 'q' error., represents any legal separator (comma,space, and/or tab).argument_list represents a list of real argumentsthat are to be used in the expansionof the indefinite repeat range. A realargument may consist of one or more7-bit ascii characters; multiplearguments must be separated by anylegal separator (comma, space, and/ortab). If an argument must containa legal separator then the up-arrow(_^) construct is require for thatargument. If no real arguments arespecified, no action is taken.range represents the block of code to berepeated once for each occurrence ofa real argument in the list. Therange may contain other macrodefinitions, repeat ranges and/orthe .mexit directive..endm indicates the end of the indefiniterepeat block range.The .irp directive is used to replace a dummy argument with suc-cessive real arguments specified in an argument list. Thisreplacement process occurrs during the expansion of an inde-finite repeat block range.THE MACRO PROCESSOR PAGE 2-17INDEFINITE REPEAT BLOCK DIRECTIVES2.5.2 .irpc DirectiveFormat:[label:] .irpc sym,string..(range of indefinite repeat block)...endmwhere: label represents an optional statement label.sym represents a dummy argument that isreplaced with successive real charactersfrom the argument string. If the dummyargument is not specified, the .irpcdirective is flagged with a 'q' error., represents any legal separator (comma,space, and/or tab).string represents a list of 7-bit asciicharacters. If the string containslegal separator characters (comma,space, and/or tab) then the up-arrow(_^) construct must delimit the string.range represents the block of code to berepeated once for each occurrence ofa real argument in the list. Therange may contain other macrodefinitions, repeat ranges and/orthe .mexit directive..endm indicates the end of the indefiniterepeat block range.The .irpc directive is available to permit single character sub-stition. On each iteration of the indefinite repeat range, thedummy argument is replaced with successive characters in thespecified string.THE MACRO PROCESSOR PAGE 2-18INDEFINITE REPEAT BLOCK DIRECTIVES2.6 REPEAT BLOCK DIRECTIVEA repeat block is similar to a macro definition with only oneargument. The argument specifies the number of times the repeatblock is inserted into the assembly stream. Since the repeatdirective and its associated range are coded in-line within thesource program, this type of macro definition and expansion doesnot require calling the macro by name, as required in the expan-sion of the conventional macros previously described.A repeat block can appear within or outside another macro de-finition, indefinite repeat block, or repeat block.2.6.1 .reptFormat:[label:] .rept exp..(range of repeat block)...endmwhere: label represents an optional statement label.exp represents any legal expression.This value controls the number oftimes the block of code is to be assembledwithin the program. When the expressionvalue is less than or equal to zero (0),the repeat block is not assembled. Ifthis value is not an absolute value, the.rept directive is flagged with an 'r'error.range represents the block of code to berepeated. The range may contain othermacro definitions, repeat ranges and/orthe .mexit directive..endm indicates the end of the repeat blockrange.The .rept directive is used to duplicate a block of code, a cer-tain number of times, in line with other source code.THE MACRO PROCESSOR PAGE 2-19REPEAT BLOCK DIRECTIVE2.7 MACRO DELETION DIRECTIVEThe .mdelete directive deletes the definitions of the thespecified macro(s).2.7.1 .mdeleteFormat:.mdelete name1,name2,...,namenwhere: name1, represent legal macro names. When multiplename2, names are specified, they are separated..., by any legal separator (comma, space, and/ornamen tab).2.8 MACRO INVOCATION DETAILSThe invocation of a macro, indefinite repeat block, or repeatblock has specific implications for .if-.else-.endif constructsand for .list-.nlist directives.At the point a macro, indefinite repeat block, or repeatblock is called the following occurs:1) The initial .if-.else-.endifstate is saved.2) The initial .list-.nliststate is saved.3) The macro, indefinite repeat block,or repeat block is inserted into theassembler source code stream. Allargument substitution is performedat this point.When the macro completes and after each pass through an inde-finite repeat block or repeat block the .if-.else-.endif and.list-.nlist state is reset to the initial state.The reset of the .if-.else-.endif state means that the invo-cation of a macro, indefinite repeat block, or repeat block can-not change the .if-.else-.endif state of the calling code. Forexample the following code does not change the .if-.else-.endifcondition at macro completion:THE MACRO PROCESSOR PAGE 2-20MACRO INVOCATION DETAILS.macro fnc A.if nb,^!A!....list (meb).mexit.else....nlist.mexit.endif.endmcode: fncWithin the macro the .if condition becomes false but the con-dition is not propagated outside the macro.Similarly, when the .list-.nlist state is changed within amacro the change is not propogated outside the macro.The normal .if-.else-.endif processing verifies that every.if has a corresponding .endif. When a macro, indefinite repeatblock, or repeat block terminates by using the .mexit directivethe .if-.endif checking is bypassed because all source linesbetween the .mexit and .endm directives are skipped.2.9 BUILDING A MACRO LIBRARYUsing the macro facilities of the ASxxxx assemblers a simplemacro library can be built. The macro library is built by com-bining individual macros, sets of macros, or include file direc-tives into a single file. Each macro entity is enclosed withina .if/.endif block that selects the desired macro definitions.The selection of specific macros to be imported in a programis performed by three macros, .mlib, .mcall, and .mload, con-tained in the file mlib.def.THE MACRO PROCESSOR PAGE 2-21BUILDING A MACRO LIBRARY2.9.1 .mlib Macro DirectiveFormat:.mlib filewhere: file represents the macro library file name.If the file name does not include a paththen the path of the current assemblyfile is used. If the file name (and/orpath) contains white space then thepath/name must be delimited with theup-arrow (^) construct ^/ /.The .mlib directive defines two macros, .mcall and .mload, whichwhen invoked will read a file, importing specific macro defini-tions. Any previous .mcall and/or .mload directives will bedeleted before the new .mcall and .mload directives are defined.The .mload directive is an internal directive which simplyincludes the macro library file with the listing disabled.The following is the mlib.def file which defines the macros.mlib, .mcall, and .mload.THE MACRO PROCESSOR PAGE 2-22BUILDING A MACRO LIBRARY;************************************************;* *;* A simple Macro Library Implementation *;* *;* December 2008 *;* *;************************************************.macro .mlib FileName.if b,^!FileName!.error 1 ; File Name Required.mexit.endif.mdelete .mcall.macro .mcall a,b,c,d,e,f,g,h.irp sym ^!a!,^!b!,^!c!,^!d!,^!e!,^!f!,^!g!,^!h!.iif nb,^!sym! .define .$$.'sym.endm.mload.irp sym ^!a!,^!b!,^!c!,^!d!,^!e!,^!f!,^!g!,^!h!.if nb,^!sym!.iif ndef,sym'.$$. .error 1 ; macro not found.undefine .$$.'sym.undefine sym'.$$..endif.endm.endm ;.mcall.mdelete .mload.macro .mload.nlist.include ^!FileName!.list.endm ;.mload.endm ;.mlib2.9.2 .mcall Macro DirectiveFormat:.mcall macro1,macro2,...,macro8where:macro1, represents from 1 to 8 macro librarymacro2, references to a macro definition or..., set of macro definitions included inmacro8 the file specified with the .mlib macro.As can be seen from the macro definition of .mlib and .mcallshown above, when .mcall is invoked temporary symbols areTHE MACRO PROCESSOR PAGE 2-23BUILDING A MACRO LIBRARYdefined for each macro or macro set that is to be imported. Themacro .mload is then invoked to load the macro library filespecified in the call to .mlib.For example, when the following macros are invoked:.mlib crossasm.sml ; Cross Assembler Macros.mcall M6809 ; M6809 Macro GroupThe .mlib macro defines the .mload macro to access the systemmacro file crossasm.sml. Invoking the .mcall macro creates atemporary symbol, '.$$.M6809', and then invokes the macro .mloadto import the system macro file crossasm.sml. The file cros-sasm.sml contains conditional statements that define the re-quired macros and creates a temporary symbol 'M6809.$$.' toindicate the macro group was found. If the macro is not foundan error message is generated.The following is a small portion of the crossasm.sml systemmacro file which shows the M6809 macro group:.title Cross Assembler Macro Library; This MACRO Library is Case Insensitive.;...; Macro Based 6809 Cross Assembler.$.SML.$. =: 0.if idn a,A.iif def,.$$.m6809 .$.SML.$. = -1.else.iif def,.$$.m6809 .$.SML.$. = -1.iif def,.$$.M6809 .$.SML.$. = 1.endif.iif lt,.$.SML.$. .define m6809.$$..iif gt,.$.SML.$. .define M6809.$$..iif ne,.$.SML.$. .include "m6809.mac"...THE MACRO PROCESSOR PAGE 2-24EXAMPLE MACRO CROSS ASSEMBLERS2.10 EXAMPLE MACRO CROSS ASSEMBLERSThe 'ascheck' subdirectory 'macroasm' contains 7 assemblerswritten using only the general macro processing facility of theASxxxx assemblers:i8085.mac - 8085 Microprocessorm6800.mac - 6800 Microprocessorm6801.mac - 6801 Microprocessorm6804.mac - 6804 Microprocessorm6805.mac - 6805 Microprocessorm6809.mac - 6809 Microprocessors2650.mac - 2650 MicroprocessorThese absolute macro cross assemblers are included to il-lustrate the functionality of the general macro processingfacility of the ASxxxx assemblers. In general they are usefulexamples of actual macro implementations.CHAPTER 3THE LINKER3.1 ASLINK RELOCATING LINKERASLINK is the companion linker for the ASxxxx assemblers.The program ASLINK is a general relocating linker performingthe following functions:1. Bind multiple object modules into a single memory image2. Resolve inter-module symbol references3. Combine code belonging to the same area from multipleobject files into a single contiguous memory region4. Search and import object module libraries for undefinedglobal variables5. Perform byte and word program counter relative(pc or pcr) addressing calculations6. Define absolute symbol values at link time7. Define absolute area base address values at link time8. Produce Intel Hex or Motorola S19 output file9. Produce a map of the linked memory image10. Produce an updated listing file with the relocated ad-dresses and dataTHE LINKER PAGE 3-2INVOKING ASLINK3.2 INVOKING ASLINKStarting ASlink without any arguments provides the followingoption list and then exits:Usage: [-Options] [-Option with arg] fileUsage: [-Options] [-Option with arg] outfile file [file ...]-p Echo commands to stdout (default)-n No echo of commands to stdoutAlternates to Command Line Input:-c ASlink >> prompt input-f file[.lnk] Command File inputLibrarys:-k Library path specification, one per -k-l Library file specification, one per -lRelocation:-b area base address=expression-g global symbol=expressionMap format:-m Map output generated as (out)file[.map]-w Wide listing format for map file-x Hexadecimal (default)-d Decimal-q OctalOutput:-i Intel Hex as (out)file[.i--]-s Motorola S Record as (out)file[.s--]-j NoICE Debug output as (out)file[.noi]-y SDCDB Debug output as (out)file[.cdb]-o Linked file/library object output enable (default)-v Linked file/library object output disableList:-u Update listing file(s) with link data as file(s)[.rst]Case Sensitivity:-z Disable Case Sensitivity for SymbolsEnd:-e or null line terminates inputNOTEWhen ASlink is invoked with a single filename thecreated output file will have the same filename as the.rel file.When ASlink is invoked with multiple filenames thefirst filename is the output filename and the remain-ing filenames are linked together into the outputTHE LINKER PAGE 3-3INVOKING ASLINKfilename.Most sytems require the options to be entered on the commandline:aslink [-Options] [-Options with args] fileaslink [-Options] [-Options with args] outfile file1 [file2...]Some systems may request the arguments after the linker isstarted at a system specific prompt:aslinkargv: -[options] -[option arg] fileaslinkargv: [-Options] [-Options with args] outfile file1 [file2...]The linker commands are explained in some more detail:1. -c ASlink >> prompt mode.The ASlink >> prompt mode reads linker commands fromstdin.2. -f file Command file mode.The command file mode imports linker commands from thespecified file (extension must be .lnk), imported -cand -f commands are ignored. If the directory path,for a file to be linked, is not specified in the com-mand file then the path defaults to the .lnk filedirectory path.3. -p/-n enable/disable echoing commands to stdout.4. -i/-s Intel Hex (file.i--), or Motorola S (file.s--)image output file.5. -o/-v Specifies that subsequent linkedfiles/libraries will generate object output (default)or suppress object output. (if option -i, -s, or -twas specified)6. -z Disable Case Sensitivity for SymbolsTHE LINKER PAGE 3-4INVOKING ASLINK7. -m Generate a map file (file.map). This filecontains a list of the symbols (by area) with absoluteaddresses, sizes of linked areas, and other linking in-formation.8. -w Specifies that a wide listing format be usedfor the map file.9. -xdq Specifies the number radix for the map file(Hexadecimal, Decimal, or Octal).10. -u Generate an updated listing file (file.rst)derived from the relocated addresses and data from thelinker.11. file File(s) to be linked. Files may be on thesame line as the above options or on a separate line(s)one file per line or multiple files separated by spacesor tabs.12. -b area=expression(one definition per line in a linker command file.)This specifies an area base address where the expres-sion may contain constants and/or defined symbols fromthe linked files.13. -g symbol=expression(one definition per line in a linker command file.)This specifies the value for the symbol where the ex-pression may contain constants and/or defined symbolsfrom the linked files.14. -k library directory path(one definition per line in a linker command file.)This specifies one possible path to an object library.More than one path is allowed.15. -l library file specification(one definition per line in a linker command file.)This specifies a possible library file. More than onefile is allowed.16. -e or null line, terminates input to the linker.ASLINK linker supported by and distributed with SDCC are:sdldsdld specific options:Miscellaneous:-I [iram-size] Check for internal RAM overflow-X [xram-size] Check for external RAM overflow-C [code-size] Check for code overflow-M Generate memory usage summary file[mem]-Y Pack internal ram-S [stack-size] Allocate space for stack-E ELF executable as file[elf]THE LINKER PAGE 3-5LIBRARY PATH(S) AND FILE(S)3.3 LIBRARY PATH(S) AND FILE(S)The process of resolving undefined symbols after scanning theinput object files includes the scanning of object modulelibraries. The linker will search through all combinations ofthe library path specifications (input by the -k option) and thelibrary file specifications (input by the -l option) that leadto an existing library file. Each library file contains a list(one file per line) of modules included in this particularlibrary. Each existing object module is scanned for a match tothe undefined symbol. The first module containing the symbol isthen linked with the previous modules to resolve the symbol de-finition. The library object modules are rescanned until nomore symbols can be resolved. The scanning algorithm allowsresolution of back references. No errors are reported for nonexistant library files or object modules.The library file specification may be formed in one of twoways:1. If the library file contained an absolute path/filespecification then this is the object module'spath/file.(i.e. C:\... or C:/...)2. If the library file contains a relative path/filespecification then the concatenation of the path andthis file specification becomes the object module'spath/file.(i.e. \... or /...)As an example, assume there exists a library file termio.libin the syslib directory specifying the following object modules:\6809\io_disk first object moduled:\special\io_comm second object moduleand the following parameters were specified to the linker:-k c:\iosystem\ the first path-k c:\syslib\ the second path-l termio the first library file-l io the second library file (no such file)The linker will attempt to use the following object modules toresolve any undefined symbols:c:\syslib\6809\io_disk.rel (concatenated path/file)d:\special\io_comm.rel (absolute path/file)THE LINKER PAGE 3-6LIBRARY PATH(S) AND FILE(S)all other path(s)/file(s) don't exist. (No errors are reportedfor non existant path(s)/file(s).)3.4 ASLINK PROCESSINGThe linker processes the files in the order they arepresented. The first pass through the input files is used todefine all program areas, the section area sizes, and symbolsdefined or referenced. Undefined symbols will initiate a searchof any specified library file(s) and the importing of the modulecontaining the symbol definition. After the first pass the -b(area base address) definitions, if any, are processed and theareas linked.The area linking proceeds by first examining the area typesABS, CON, REL, OVR and PAG. Absolute areas (ABS) from separateobject modules are always overlayed and have been assembled at aspecific address, these are not normally relocated (if a -b com-mand is used on an absolute area the area will be relocated).Relative areas (normally defined as REL|CON) have a base addressof 0x0000 as read from the object files, the -b command speci-fies the beginning address of the area. All subsequent relativeareas will be concatenated with proceeding relative areas.Where specific ordering is desired, the first linker input fileshould have the area definitions in the desired order. At thecompletion of the area linking all area addresses and lengthshave been determined. The areas of type PAG are verified to beon a 256 byte boundary and that the length does not exceed 256bytes. Any errors are noted on stderr and in the map file.Next the global symbol definitions (-g option), if any, areprocessed. The symbol definitions have been delayed until thispoint because the absolute addresses of all internal symbols areknown and can be used in the expression calculations.Before continuing with the linking process the symbol tableis scanned to determine if any symbols have been referenced butnot defined. Undefined symbols are listed on the stderr device.if a .module directive was included in the assembled file themodule making the reference to this undefined variable will beprinted.Constants defined as global in more than one module will beflagged as multiple definitions if their values are not identi-cal.After the preceeding processes are complete the linker mayoutput a map file (-m option). This file provides the followinginformation:THE LINKER PAGE 3-7ASLINK PROCESSING1. Global symbol values and label absolute addresses2. Defined areas and there lengths3. Remaining undefined symbols4. List of modules linked5. List of library modules linked6. List of -b and -g definitionsThe final step of the linking process is performed during thesecond pass of the input files. As the xxx.rel files are readthe code is relocated by substituting the physical addresses forthe referenced symbols and areas and may be output in Intel orMotorola formats. The number of fileslinked and symbols defined/referenced is limited by the proces-sor space available to build the area/symbol lists. If the -uoption is specified then the listing files (file.lst) associatedwith the relocation files (file.rel) are scanned and used tocreate a new file (file.rst) which has all addresses and datarelocated to their final values.The -o/-v options allow the simple creation of loadable oroverlay modules. Loadable and overlay modules normally need tobe linked with a main module(s) to resolve external symbols.The -o/-v options can be used to enable object output for theloadable or overlay module(s) and suppress the object code fromthe linked main module(s). The -o/-v options can be appliedrepeatedly to specify a single linked file, groups of files, orlibraries for object code inclusion or suppression.THE LINKER Page 3-15ASXXXX VERSION 3.XX LINKING3.6 ASXXXX VERSION 3.XX LINKINGThe linkers' input object file is an ascii file containingthe information needed by the linker to bind multiple objectmodules into a complete loadable memory image.The object module contains the following designators:[XDQ][HL][234]X Hexadecimal radixD Decimal radixQ Octal radixH Most significant byte firstL Least significant byte first2 16-Bit Addressing3 24-Bit Addressing4 32-Bit AddressingH HeaderM ModuleA AreaS SymbolT Object codeR Relocation informationP Paging information3.6.1 Object Module FormatThe first line of an object module contains the[XDQ][HL][234] format specifier (i.e. XH2 indicates a hexa-decimal file with most significant byte first and 16-bit ad-dressing) for the following designators.3.6.2 Header LineH aa areas gg global symbolsThe header line specifies the number of areas(aa) and thenumber of global symbols(gg) defined or referenced in this ob-ject module segment.THE LINKER PAGE 3-16ASXXXX VERSION 3.XX LINKING3.6.3 Module LineM nameThe module line specifies the module name from which thisheader segment was assembled. The module line will not appearif the .module directive was not used in the source program.3.6.4 Area LineA label size ss flags ffThe area line defines the area label, the size (ss) of thearea in bytes, and the area flags (ff). The area flags specifythe ABS, REL, CON, OVR, and PAG parameters:OVR/CON (0x04/0x00 i.e. bit position 2)ABS/REL (0x08/0x00 i.e. bit position 3)PAG (0x10 i.e. bit position 4)3.6.5 Symbol LineS name DefnnnnorS name RefnnnnThe symbol line defines (Def) or references (Ref) the identi-fier name with the value nnnn. The defined value is relative tothe current area base address. References to constants and ex-ternal global symbols will always appear before the first areadefinition. References to external symbols will have a value ofzero.3.6.6 T LineT xx xx nn nn nn nn nn ...The T line contains the assembled code output by the assem-bler with xx xx being the offset address from the current areabase address and nn being the assembled instructions and data inbyte format.THE LINKER PAGE 3-17ASXXXX VERSION 3.XX LINKING3.6.7 R LineR 0 0 nn nn n1 n2 xx xx ...The R line provides the relocation information to the linker.The nn nn value is the current area index, i.e. which area thecurrent values were assembled. Relocation information is en-coded in groups of 4 bytes:1. n1 is the relocation mode and object format, for theadhoc extension modes refer to asxxxx.h or aslink.h1. bit 0 word(0x00)/byte(0x01)2. bit 1 relocatable area(0x00)/symbol(0x02)3. bit 2 normal(0x00)/PC relative(0x04) relocation4. bit 3 1-byte(0x00)/2-byte(0x08) object format5. bit 4 signed(0x00)/unsigned(0x10) byte data6. bit 5 normal(0x00)/page '0'(0x20) reference7. bit 6 normal(0x00)/page 'nnn'(0x40) reference8. bit 7 LSB byte(0x00)/MSB byte(0x80)2. n2 is a byte index into the corresponding (i.e. pre-ceeding) T line data (i.e. a pointer to the data to beupdated by the relocation). The T line data may be1-byte or 2-byte byte data format or 2-byte wordformat.3. xx xx is the area/symbol index for the area/symbol be-ing referenced. the corresponding area/symbol is foundin the header area/symbol lists.The groups of 4 bytes are repeated for each item requiring relo-cation in the preceeding T line.3.6.8 P LineP 0 0 nn nn n1 n2 xx xxThe P line provides the paging information to the linker asspecified by a .setdp directive. The format of the relocationinformation is identical to that of the R line. The correspond-ing T line has the following information:T xx xx aa aa bb bbWhere aa aa is the area reference number which specifies theselected page area and bb bb is the base address of the page.bb bb will require relocation processing if the 'n1 n2 xx xx' isspecified in the P line. The linker will verify that the baseaddress is on a 256 byte boundary and that the page length of anarea defined with the PAG type is not larger than 256 bytes.THE LINKER PAGE 3-18ASXXXX VERSION 3.XX LINKINGThe linker defaults any direct page references to the firstarea defined in the input REL file. All ASxxxx assemblers willspecify the _CODE area first, making this the default page area.3.6.9 24-Bit and 32-Bit AddressingWhen 24-bit or 32-bit addressing is specified in the fileformat line [XDQ][HL][234] then the S and T Lines have modifiedformats:S name Defnnnnnn (24-bit)S name Refnnnnnn (24-bit)T xx xx xx nn nn nn nn nn ... (24-bit)S name Defnnnnnnnn (32-bit)S name Refnnnnnnnn (32-bit)T xx xx xx xx nn nn nn nn nn ... (32-bit)The multibyte formats for byte data replace the 2-byte formfor 16-bit data with 3-byte or 4-byte data for 24-bit or 32-bitdata respectively. The 2nd byte format (also named MSB) alwaysuses the second byte of the 2, 3, or 4-byte data.3.6.10 ASlink V3.xx Error MessagesThe linker provides detailed error messages allowing the pro-grammer to quickly find the errant code. As the linker com-pletes pass 1 over the input file(s) it reports any pageboundary or page length errors as follows:?ASlink-Warning-Paged Area PAGE0 Boundary Errorand/or?ASlink-Warning-Paged Area PAGE0 Length Errorwhere PAGE0 is the paged area.During Pass two the linker reads the T, R, and P lines per-forming the necessary relocations and outputting the absolutecode. Various errors may be reported during this processTHE LINKER PAGE 3-19ASXXXX VERSION 3.XX LINKINGThe P line processing can produce only one possible error:?ASlink-Warning-Page Definition Boundary Errorfile module pgarea pgoffsetPgDef t6809l t6809l PAGE0 0001The error message specifies the file and module where the .setdpdirect was issued and indicates the page area and the pageoffset value determined after relocation.The R line processing produces various errors:?ASlink-Warning-Byte PCR relocation error for symbol bra2?ASlink-Warning-Unsigned Byte error for symbol two56?ASlink-Warning-Page0 relocation error for symbol ltwo56?ASlink-Warning-Page Mode relocation error for symbol two56?ASlink-Warning-Page Mode relocation error?ASlink-Warning-2K Page relocation error?ASlink-Warning-512K Page relocation errorThese error messages also specify the file, module, area, andoffset within the area of the code referencing (Refby) and de-fining (Defin) the symbol:?ASlink-Warning-Unsigned Byte error for symbol two56file module area offsetRefby t6800l t6800l DIRECT 0015Defin tconst tconst . .ABS. 0100If the symbol is defined in the same module as the reference thelinker is unable to report the symbol name. The assembler list-ing file(s) should be examined at the offset from the specifiedarea to locate the offending code.The errors are:1. The byte PCR error is caused by exceeding the pc rela-tive byte branch range.2. The Unsigned byte error indicates an indexing value wasnegative or larger than 255.3. The Page0 error is generated if the direct page vari-able is not in the page0 range of 0 to 255.4. The page mode error is generated if the direct variableis not within the current direct page (6809).5. The 2K Page relocation error is generated if thedestination is not within the current 2K page (8051,DS8xCxxx).THE LINKER PAGE 3-20ASXXXX VERSION 3.XX LINKING6. The 512K Page relocation error is generated if thedestination is not within the current 512K page(DS80C390).THE LINKER Page 3-21INTEL IHX OUTPUT FORMAT3.7 INTEL IHX OUTPUT FORMAT (16-BIT)Record Mark Field - This field signifies the start of arecord, and consists of an ascii colon(:).Record Length Field - This field consists of two asciicharacters which indicate the number ofdata bytes in this record. Thecharacters are the result of convertingthe number of bytes in binary to twoascii characters, high digit first. AnEnd of File record contains two asciizeros in this field.Load Address Field - This field consists of the four asciicharacters which result from convertingthe the binary value of the address inwhich to begin loading this record. Theorder is as follows:High digit of high byte of address.Low digit of high byte of address.High digit of low byte of address.Low digit of low byte of address.In an End of File record this field con-sists of either four ascii zeros or theprogram entry address.Record Type Field - This field identifies the record type,which is either 0 for data records or 1for an End of File record. It consistsof two ascii characters, with the highdigit of the record type first, followedby the low digit of the record type.Data Field - This field consists of the actual data,converted to two ascii characters, highdigit first. There are no data bytes inthe End of File record.Checksum Field - The checksum field is the 8 bit binarysum of the record length field, the loadaddress field, the record type field,and the data field. This sum is thennegated (2's complement) and convertedto two ascii characters, high digitfirst.THE LINKER Page 3-22INTEL I86 OUTPUT FORMAT3.8 INTEL I86 OUTPUT FORMAT (24 OR 32-BIT)Record Mark Field - This field signifies the start of arecord, and consists of an ascii colon(:).Record Length Field - This field consists of two asciicharacters which indicate the number ofdata bytes in this record. Thecharacters are the result of convertingthe number of bytes in binary to twoascii characters, high digit first. AnEnd of File record contains two asciizeros in this field.Load Address Field - This field consists of the four asciicharacters which result from convertingthe the binary value of the address inwhich to begin loading this record. Theorder is as follows:High digit of high byte of address.Low digit of high byte of address.High digit of low byte of address.Low digit of low byte of address.In an End of File record this field con-sists of either four ascii zeros or theprogram entry address.Record Type Field - This field identifies the record type,which is either 0 for data records, 1for an End of File record, or 4 for asegment record. It consists of twoascii characters, with the high digit ofthe record type first, followed by thelow digit of the record type.Data Field - This field consists of the actual data,converted to two ascii characters, highdigit first. There are no data bytes inthe End of File record.Checksum Field - The checksum field is the 8 bit binarysum of the record length field, the loadaddress field, the record type field,and the data field. This sum is thennegated (2's complement) and convertedto two ascii characters, high digitfirst.THE LINKER Page 3-23MOTOROLA S1-S9 OUTPUT FORMAT3.9 MOTORLA S1-S9 OUTPUT FORMAT (16-BIT)Record Type Field - This field signifies the start of arecord and identifies the the recordtype as follows:Ascii S1 - Data RecordAscii S9 - End of File RecordRecord Length Field - This field specifies the record lengthwhich includes the address, data, andchecksum fields. The 8 bit recordlength value is converted to two asciicharacters, high digit first.Load Address Field - This field consists of the four asciicharacters which result from convertingthe the binary value of the address inwhich to begin loading this record. Theorder is as follows:High digit of high byte of address.Low digit of high byte of address.High digit of low byte of address.Low digit of low byte of address.In an End of File record this field con-sists of either four ascii zeros or theprogram entry address.Data Field - This field consists of the actual data,converted to two ascii characters, highdigit first. There are no data bytes inthe End of File record.Checksum Field - The checksum field is the 8 bit binarysum of the record length field, the loadaddress field, and the data field. Thissum is then complemented (1's comple-ment) and converted to two asciicharacters, high digit first.CHAPTER 4BUILDING ASXXXX AND ASLINKThe assemblers and linker have been successfully compiled forLinux, DOS, and various flavors of Windows using the Linux GCC,the Cygwin environment, the DJGPP environment, and the graphicaluser interfaces and command line environments ofMS Visual C++ V6.0, MS Visual Studio 2005,MS Visual Studio 2010, Open Watcom V1.7, Symantec C/C++ V7.2,and Turbo C 3.0.Makefiles for Linux, Cygwin, DJGPP, project files and amakefile for Turbo C and psuedo makefiles and project files forVC6, VS2005, VS2010, Open Watcom and Symantec are available tobuild all the assemblers and the linker.Unpack the asxv5pxx.zip file into an appropriate directoryusing the utility appropriate to your environment. For DOS orWindows the following command line will unpack the distributionzip file:pkunzip -d asxv5pxx.zipThe distribution file has been packed with DOS style end oflines (CR/LF), and UPPER CASE file names. The Linux make fileassumes all lower case directories and file names. For Linuxthe unpacking utility you choose should have an option to forceall lower case directories / file names and convert the asciifiles to local format. On most systems the following commandshould do the trick:unzip -L -a asxv5pxx.zipSome systems may require a -LL option to force all lower case.The distribution will be unpacked into the base directory'asxv5pxx' which will contain source directories for each sup-ported processor (as6800, asz80, ...), the machine independentsource (asxxsrc), the linker source (linksrc), and theBUILDING ASXXXX AND ASLINK Page 4-2miscellaneous sources (asxxmisc). Other directories include thedocumentation (asxdoc), test file directory (asxtst), html do-cumentation (asxhtml), NoICE support files (noice), variousdebug monitors that can be assembled with the ASxxxx assemblers(asmasm), project files for an application that uses the AS6809assembler and ASlink linker (project), and the packaging direc-tory (zipper).4.1 BUILDING ASXXXX AND ASLINK WITH LINUXThe Linux build directory is /asxv5pxx/asxmak/linux/build.The makefile in this directory is compatible with the Linux GNUmake and GCC. The commandmake cleanwill remove all the current executable files in directory/asxv5pxx/asxmak/linux/exe and all the compiled object modulesfrom the /asxv5pxx/asxmak/linux/build directory.The commandmake allwill compile and link all the ASxxxx assemblers, the ASlink pro-gram, and the utility programs asxscn and asxcnv. The make filecan make a single program by invoking make with the specific as-sembler, linker, or utility you wish to build:make aslink4.2 BUILDING ASXXXX AND ASLINK UNDER CYGWINThe Cygwin build directory is \asxv5pxx\asxmak\cygwin\build.The makefile in this directory is compatible with the Cygwin GNUmake and GCC. The commandmake cleanwill remove all the current executable files in directory\asxv5pxx\asxmak\cygwin\exe and all the compiled object modulesfrom the \asxv5pxx\asxmak\cygwin\build directory. The commandmake allwill compile and link all the ASxxxx assemblers, the ASlink pro-gram, and the utility programs asxscn and asxcnv. The make filecan make a single program by invoking make with the specificBUILDING ASXXXX AND ASLINK PAGE 4-3BUILDING ASXXXX AND ASLINK UNDER CYGWINassembler, linker, or utility you wish to build:make aslink4.3 BUILDING ASXXXX AND ASLINK WITH DJGPPThe DJGPP build directory is \asxv5pxx\asxmak\djgpp\build.The makefile in this directory is compatible with the DJGPP GNUmake and GCC. The commandmake cleanwill remove all the current executable files in directory\asxv5pxx\asxmak\djgpp\exe and all the compiled object modulesfrom the \asxv5pxx\asxmak\djgpp\build directory. The commandmake allwill compile and link all the ASxxxx assemblers, the ASlink pro-gram, and the utility programs asxscn and asxcnv. The make filecan make a single program by invoking make with the specific as-sembler, linker, or utility you wish to build:make aslink4.4 BUILDING ASXXXX AND ASLINK WITH BORLAND'S TURBO C++ 3.0The Borland product is available in the Borland Turbo C++Suite which contains C++ Builder 1.0, Turbo C++ 4.5 for Windowsand Turbo C++ 3.0 for DOS. The DOS IDE will install and run onx86 (16 or 32 bit) versions of Windows (not x64 versions).4.4.1 Graphical User InterfaceEach ASxxxx Assembler has two project specific files(*.dsk and *.prj) located in the subdirectory\asxv5pxx\asxmak\turboc30\build. You must enter the .prjfilename into the Turbo C++ IDE: enter Options->Directories andchange the include and output directories to match your confi-guration. After these changes have been made you will be ableto compile the selected project. These changes must be manuallyentered for each project.BUILDING ASXXXX AND ASLINK PAGE 4-4BUILDING ASXXXX AND ASLINK WITH BORLAND'S TURBO C++ 3.04.4.2 Command Line InterfaceBefore the command line interface can be used you must per-form the steps outlined in the 'Graphical User Interface' in-structions above for each project you wish to build.Open a command prompt window in the\asxv5pxx\asxmak\turboc30\build directory. Assuming the Turbo Ccompiler has been installed in the default location (C:\TC) thefile _setpath.bat will set the PATH variable. If this is notthe case then the linePATH=C:\TC;C:\TC\BIN;C:\TC\INCLUDEmust be changed to match your environment. The compiled objectcode modules will be placed in the\asxv5pxx\asxmak\turboc30\build\ directory and the executablefiles will be placed in the \asxv5pxx\asxmak\turboc30\exe direc-tory.The commandmake allwill compile and link all the ASxxxx assemblers, the ASlink pro-gram, and the utility programs asxscn and asxcnv. The make filecan make a single program by invoking make with the specific as-sembler, linker, or utility you wish to build:make aslinkThe Turbo C make utility uses the information in the correspond-ing .prj and .dsk files to compile and link the programs.The file _makeall.bat found in the directory can also be usedto invoke the Turbo C command line compiler. The _makeall.batfile calls the _setpath.bat file to set the path to the compilerdirectories in the environment variable PATH and then invokes'make all'.BUILDING ASXXXX AND ASLINK PAGE 4-5BUILDING ASXXXX AND ASLINK WITH MS VISUAL C++ 6.04.5 BUILDING ASXXXX AND ASLINK WITH MS VISUAL C++ 6.04.5.1 Graphical User InterfaceEach ASxxxx Assembler has a VC6 project file (*.dsw) locatedin a subdirectory of \asxv5pxx\asxmak\vc6\build. Simply enterthis project filename into the VC6 IDE and build/rebuild the as-sembler.4.5.2 Command Line InterfaceOpen a command prompt window in the\asxv5pxx\asxmak\vc6\build directory. The file make.bat foundin the directory can be used to invoke the VC6 command line com-piler. The make.bat file assumes that the Visual C++ compilerhas been installed in the default location. If this is not thecase then the lineSET MS$DEV="C:\Program Files\Microsoft Visual Studio\Common\MSDev98\Bin\msdev.exe"must be changed to match your environment. The compiled objectcode modules will be placed in the\asxv5pxx\asxmak\vc6\build\as----\release directory and the exe-cutable files will be placed in the \asxv5pxx\asxmak\vc6\exedirectory.The commandmake allwill compile and link all the ASxxxx assemblers, the ASlink pro-gram, and the utility programs asxscn and asxcnv. The make filecan make a single program by invoking make with the specific as-sembler, linker, or utility you wish to build:make aslinkThe VC6 command line compiler uses the information in the cor-responding .dsw/.dsp files to compile and link the programs.The command 'make clean' is not required or valid as a makeof anything does a complete rebuild of the program.BUILDING ASXXXX AND ASLINK PAGE 4-6BUILDING ASXXXX AND ASLINK WITH MS VISUAL STUDIO 20054.6 BUILDING ASXXXX AND ASLINK WITH MS VISUAL STUDIO 20054.6.1 Graphical User InterfaceEach ASxxxx Assembler has a VS2005 project file (*.vcproj)located in a subdirectory of \asxv5pxx\asxmak\vs05\build. Sim-ply enter this project filename into the VS2005 IDE andbuild/rebuild the assembler.4.6.2 Command Line InterfaceOpen a command prompt window in the\asxv5pxx\asxmak\vs05\build directory. The file make.bat foundin the directory can be used to invoke the VS2005 command linecompiler. The make.bat file assumes that the Visual C++ com-piler has been installed in the default location. If this isnot the case then the lineSET VC$BUILD="C:\Program Files\Microsoft Visual Studio 8\Common\MSDev98\Bin\msdev.exe"must be changed to match your environment. The compiled objectcode modules will be placed in the\asxv5pxx\asxmak\vs05\build\as----\release directory and the ex-ecutable files will be placed in the \asxv5pxx\asxmak\vs05\exedirectory.The commandmake allwill compile and link all the ASxxxx assemblers, the ASlink pro-gram, and the utility programs asxscn and asxcnv. The make filecan make a single program by invoking make with the specific as-sembler, linker, or utility you wish to build:make aslinkThe VS2005 command line compiler uses the information in thecorresponding .vcproj file to compile and link the programs.The command 'make clean' is not required or valid as a makeof anything does a complete rebuild of the program.BUILDING ASXXXX AND ASLINK PAGE 4-7BUILDING ASXXXX AND ASLINK WITH MS VISUAL STUDIO 20104.7 BUILDING ASXXXX AND ASLINK WITH MS VISUAL STUDIO 20104.7.1 Graphical User InterfaceEach ASxxxx Assembler has a VS2010 project file (*.vcxproj)located in a subdirectory of \asxv5pxx\asxmak\vs10\build. Sim-ply enter this project filename into the VS2010 IDE andbuild/rebuild the assembler.4.7.2 Command Line InterfaceOpen a command prompt window in the\asxv5pxx\asxmak\vs10\build directory. The file make.bat foundin the directory can be used to invoke the VS2010 command linecompiler. The make.bat file assumes that the Visual C++ com-piler has been installed in the default location. If this isnot the case then the linecall "c:\Program Files (x86)\Microsoft Visual Studio 10.0\VC\bin\vcvars32.bat"must be changed to match your environment. The compiled objectcode modules will be placed in the\asxv5pxx\asxmak\vs10\build\as----\release directory and the ex-ecutable files will be placed in the \asxv5pxx\asxmak\vs10\exedirectory.The commandmake allwill compile and link all the ASxxxx assemblers, the ASlink pro-gram, and the utility programs asxscn and asxcnv. The make filecan make a single program by invoking make with the specific as-sembler, linker, or utility you wish to build:make aslinkThe VS2010 command line compiler uses the information in thecorresponding .vcxproj file to compile and link the programs.The command 'make clean' is not required or valid as a makeof anything does a complete rebuild of the program.BUILDING ASXXXX AND ASLINK PAGE 4-8BUILDING ASXXXX AND ASLINK WITH OPEN WATCOM V1.94.8 BUILDING ASXXXX AND ASLINK WITH OPEN WATCOM V1.94.8.1 Graphical User InterfaceEach ASxxxx Assembler has a set of project files (.prj, .tgt,.mk, .mk1, and .lk1) located in the subdirectory\asxv5pxx\asxmak\watcom\build. You will have to edit the pro-ject files to match your local file locations.4.8.2 Command Line InterfaceOpen a command prompt window in the\asxv5pxx\asxmak\watcom\build directory. Assuming the Watcomcompiler has been installed in the default location (C:\WATCOM)the file _setpath.bat will set the PATH variable. If this isnot the case then the linePATH=C:\WATCOM\BINNT;C:\WATCOM\BINWmust be changed to match your environment. The compiled objectcode modules will be placed in the\asxv5pxx\asxmak\watcom\build\ directory and the executablefiles will be placed in the \asxv5pxx\asxmak\watcom\exe direc-tory.The commandmake allwill compile and link all the ASxxxx assemblers, the ASlink pro-gram, and the utility programs asxscn and asxcnv. The make filecan make a single program by invoking make with the specific as-sembler, linker, or utility you wish to build:make aslinkThe Watcom command line compiler wmake.exe uses the informationin the corresponding project files to compile and link the pro-grams.The file _makeall.bat found in the directory can also be usedto invoke the Watcom command line compiler. The _makeall.batfile calls the _setpath.bat file to set the path to the compilerBUILDING ASXXXX AND ASLINK PAGE 4-9BUILDING ASXXXX AND ASLINK WITH OPEN WATCOM V1.9directories in the environment variable PATH and then invokes'make all'.The command 'make clean' is not required or valid as a makeof anything does a complete rebuild of the program.4.9 BUILDING ASXXXX AND ASLINK WITH SYMANTEC C/C++ V7.2The Symantec product is no longer available but is includedfor historical reasons (the final version, 7.5, was introducedin 1996). The product had an excellent graphical user inter-face, built in editor, project manager, and supported DOS, Ex-tended DOS (the executable contained a built in DOS extenderwhich was rendered unusable in Windows 2000, after service pack2, or in Windows XP), Win95, and Windows NT.4.9.1 Graphical User InterfaceEach ASxxxx Assembler has a series of project specific files(*.bro, *.def, *.dpd, *.lnk, *.mak, *.opn, and *.prj) located inin the subdirectory \asxv5pxx\asxmak\symantec\build. You mustenter the .prj filename into the Symantec IDE and then selectProject->Settings->Directories and change the include, target,and compiler output directories to match your configuration.After these changes have been made you will be able to compilethe selected project. These changes must be manually enteredfor each project.4.9.2 Command Line InterfaceBefore the command line interface can be used you must per-form the steps outlined in the 'Graphical User Interface' in-structions above for each project you wish to build.Open a command prompt window in the\asxv5pxx\asxmak\symantec\build directory. The file make.batfound in the directory can be used to invoke the Symantec com-mand line compiler. The make.bat file assumes that the path tothe compiler directories has been set in the environment vari-able PATH. Assuming the Symantec compiler has been installed inthe default location (C:\SC) the file _setpath.bat will set thePATH variable. If this is not the case then the linePATH=C:\SC;C:\SC\BIN;C:\SC\INCLUDE;C:\SC\LIBmust be changed to match your environment. The compiled objectBUILDING ASXXXX AND ASLINK PAGE 4-10BUILDING ASXXXX AND ASLINK WITH SYMANTEC C/C++ V7.2code modules will be placed in the\asxv5pxx\asxmak\symantec\build directory and the executablefiles will be placed in the \asxv5pxx\asxmak\symantec\exe direc-tory.The commandmake allwill compile and link all the ASxxxx assemblers, the ASlink pro-gram, and the utility programs asxscn and asxcnv. The make filecan make a single program by invoking make with the specific as-sembler, linker, or utility you wish to build:make aslinkThe Symantec make utility , smake.exe, uses the information inthe corresponding .mak files to compile and link the programs.The file _makeall.bat found in the directory can also be usedto invoke the Symantec command line compiler. The _makeall.batfile calls the _setpath.bat file to set the path to the compilerdirectories in the environment variable PATH and then invokes'make all'.4.10 THE _CLEAN.BAT AND _PREP.BAT FILESEach of the build directories have two maintenance files:_prep.bat and _clean.bat. The command file _prep.bat preparesthe particular compiler directories for distribution by removingall exteraneous files but keeping the final compiled execut-ables. The _clean.bat command file performs the same functionas _prep.bat and removes the compiled executables.APPENDIX AKAS68(HC[S])08 ASSEMBLERAK.1 PROCESSOR SPECIFIC DIRECTIVESThe MC68HC(S)08 processor is a superset of the MC6805 proces-sors. The AS6808 assembler supports the HC08, HCS08, 6805, andHC05 cores.AK.1.1 .hc08 DirectiveFormat:.hc08The .hc08 directive enables processing of only the HC08 specificmnemonics. 6805/HC05/HCS08 mnemonics encountered without the.hc08 directive will be flagged with an 'o' error.The .hc08 directive also selects the HC08 specific cyclescount to be output.AK.1.2 .hcs08 DirectiveFormat:.hcs08The .hcs08 directive enables processing of the HCS08 specificmnemonics.The .hcs08 directive also selects the HCS08 specific cyclescount to be output.AS68(HC[S])08 ASSEMBLER PAGE AK-2PROCESSOR SPECIFIC DIRECTIVESAK.1.3 .6805 DirectiveFormat:.6805The .6805 directive enables processing of only the 6805/HC05specific mnemonics. HC08/HCS08 mnemonics encountered withoutthe .hc08/.hcs08 directives will be flagged with an 'o' error.The .6805 directive also selects the MC6805 specific cyclescount to be output.AK.1.4 .hc05 DirectiveFormat:.hc05The .hc05 directive enables processing of only the 6805/HC05specific mnemonics. HC08/HCS08 mnemonics encountered withoutthe .hc08/.hcs08 directives will be flagged with an 'o' error.The .hc05 directive also selects the MC68HC05/146805 specificcycles count to be output.AK.1.5 The .__.CPU. VariableThe value of the pre-defined symbol '.__.CPU.' corresponds tothe selected processor type. The default value is 0 which cor-responds to the default processor type. The following tablelists the processor types and associated values for the AS6808assembler:Processor Type .__.CPU. Value-------------- --------------.hc08 0.hcs08 1.6805 2.hc05 3The variable '.__.CPU.' is by default defined as local andwill not be output to the created .rel file. The assembler com-mand line options -g or -a will not cause the local symbol to beoutput to the created .rel file.The assembler .globl directive may be used to change thevariable type to global causing its definition to be output toAS68(HC[S])08 ASSEMBLER PAGE AK-3PROCESSOR SPECIFIC DIRECTIVESthe .rel file. The inclusion of the definition of the variable'.__.CPU.' might be a useful means of validating that seperatelyassembled files have been compiled for the same processor type.The linker will report an error for variables with multiple nonequal definitions.AK.2 68HC(S)08 REGISTER SETThe following is a list of the 68HC(S)08 registers used byAS6808:a - 8-bit accumulatorx - index register <H:X>s - stack pointerAK.3 68HC(S)08 INSTRUCTION SETThe following tables list all 68HC(S)08 mnemonics recognizedby the AS6808 assembler. The designation [] refers to a re-quired addressing mode argument. The following list specifiesthe format for each addressing mode supported by AS6808:#data immediate databyte or word data*dir direct page addressing(see .setdp directive)0 <= dir <= 255,x register indexed addressingzero offsetoffset,x register indexed addressing0 <= offset <= 255 --- byte mode256 <= offset <= 65535 --- word mode(an externally defined offset uses theword mode),x+ register indexed addressingzero offset with post incrementoffset,x+ register indexed addressingunsigned byte offset with post incrementoffset,s stack pointer indexed addressing0 <= offset <= 255 --- byte mode256 <= offset <= 65535 --- word mode(an externally defined offset uses theword mode)AS68(HC[S])08 ASSEMBLER PAGE AK-468HC(S)08 INSTRUCTION SEText extended addressinglabel branch labelThe terms data, dir, offset, and ext may all be expressions.Note that not all addressing modes are valid with every in-struction, refer to the 68HC(S)08 technical data for validmodes.AK.3.1 Control Instructionsclc cli daa divmul nop nsa pshapshh pshx pula pulhpulx rsp rti rtssec sei stop switap tax tpa tsxtxa txs waitAK.3.2 Bit Manipulation Instructionsbrset #data,*dir,labelbrclr #data,*dir,labelbset #data,*dirbclr #data,*dirAK.3.3 Branch Instructionsbra label brn labelbhi label bls labelbcc label bcs labelbne label beq labelbhcc label bhcs labelbpl label bmi labelbmc label bms labelbil label bih labelbsr label bge labelblt label bgt labelble labelAS68(HC[S])08 ASSEMBLER PAGE AK-568HC(S)08 INSTRUCTION SETAK.3.4 Complex Branch Instructionscbeqa [],labelcbeqx [],labelcbeq [],labeldbnza labeldbnzx labeldbnz [],labelAK.3.5 Read-Modify-Write Instructionsnega negxneg []coma comxcom []lsra lsrxlsr []rora rorxror []asra asrxasr []asla aslxasl []lsla lslxlsl []rola rolxrol []deca decxdec []inca incxinc []tsta tstxtst []clra clrxclr [] clrhaix #dataais #dataAS68(HC[S])08 ASSEMBLER PAGE AK-668HC(S)08 INSTRUCTION SETAK.3.6 Register\Memory Instructionssub [] cmp []sbc [] cpx []and [] bit []lda [] sta []eor [] adc []ora [] add []ldx [] stx []AK.3.7 Double Operand Move Instructionmov [],[]AK.3.8 16-Bit <H:X> Index Register Instructionscphx []ldhx []sthx []AK.3.9 Jump and Jump to Subroutine Instructionsjmp [] jsr []APPENDIX ARAS8051 ASSEMBLERAR.1 ACKNOWLEDGMENTThanks to John Hartman for his contribution of the AS8051cross assembler.John L. Hartmanjhartman at compuserve dot comnoice at noicedebugger dot comAR.2 8051 REGISTER SETThe following is a list of the 8051 registers used by AS8051:a,b - 8-bit accumulatorsr0,r1,r2,r3 - 8-bit registersr4,r5,r6,r7dptr - data pointersp - stack pointerpc - program counterpsw - status wordc - carry (bit in status word)AS8051 ASSEMBLER PAGE AR-28051 REGISTER SETAR.3 8051 INSTRUCTION SETThe following tables list all 8051 mnemonics recognized bythe AS8051 assembler. The following list specifies the formatfor each addressing mode supported by AS8051:#data immediate databyte or word datar,r1,r2 register r0,r1,r2,r3,r4,r5,r6, or r7@r indirect on register r0 or r1@dptr indirect on data pointer@a+dptr indirect on accumulatorplus data pointer@a+pc indirect on accumulatorplus program counteraddr direct memory addressbitaddr bit addresslabel call or jump labelThe terms data, addr, bitaddr, and label may all be expressions.Note that not all addressing modes are valid with every in-struction. Refer to the 8051 technical data for valid modes.AR.3.1 Inherent InstructionsnopAS8051 ASSEMBLER PAGE AR-38051 INSTRUCTION SETAR.3.2 Move Instructionsmov a,#data mov a,addrmov a,r mov a,@rmov r,#data mov r,addrmov r,amov addr,a mov addr,#datamov addr,r mov addr,@rmov addr1,addr2 mov bitaddr,cmov @r,#data mov @r,addrmov @r,amov c,bitaddrmov dptr,#datamovc a,@a+dptr movc a,@a+pcmovx a,@dptr movx a,@rmovx @dptr,a movx @r,aAR.3.3 Single Operand Instructionsclr a clr cclr bitaddrcpl a cpl ccpl bitaddrsetb c setb bitaddrda arr a rrc arl a rlc aswap adec a dec rdec @rinc a inc rinc dptr inc @rdiv ab mul abpop addr push addrAS8051 ASSEMBLER PAGE AR-48051 INSTRUCTION SETAR.3.4 Two Operand Instructionsadd a,#data add a,addradd a,r add a,@raddc a,#data addc a,addraddc a,r addc a,@rsubb a,#data subb a,addrsubb a,r subb a,@rorl a,#data orl a,addrorl a,r orl a,@rorl addr,a orl addr,#dataorl c,bitaddr orl c,/bitaddranl a,#data anl a,addranl a,r anl a,@ranl addr,a anl addr,#dataanl c,bitaddr anl c,/bitaddrxrl a,#data xrl a,addrxrl a,r xrl a,@rxrl addr,a xrl addr,#dataxrl c,bitaddr xrl c,/bitaddrxch a,addr xch a,rxch a,@r xchd a,@rAR.3.5 Call and Return Instructionsacall label lcall labelret retiin dataout datarst dataAR.3.6 Jump Instructionsajmp labelcjne a,#data,label cjne a,addr,labelcjne r,#data,label cjne @r,#data,labeldjnz r,label djnz addr,labeljbc bitadr,labeljb bitadr,label jnb bitadr,labeljc label jnc labeljz label jnz labeljmp @a+dptrljmp label sjmp labelAS8051 ASSEMBLER PAGE AR-58051 INSTRUCTION SETAR.3.7 Predefined Symbols: SFR Map--------- 4 Bytes -------------- ---- ---- ----FC FFF8 FBF4 F7F0 B F3EC EFE8 EBE4 E7E0 ACC E3DC DFD8 DBD4 D7D0 PSW D3CC [ TL2 TH2 ] CFC8 [ T2CON RCAP2L RCAP2H ] CBC4 C7C0 C3BC BFB8 IP BBB4 B7B0 P3 B3AC AFA8 IE ABA4 A7A0 P2 A39C 9F98 SCON SBUF 9B94 9790 P1 938C TH0 TH1 8F88 TCON TMOD TL0 TL1 8B84 PCON 8780 P0 SP DPL DPH 83[...] Indicates Resident in 8052, not 8051A is an allowed alternate for ACC.AS8051 ASSEMBLER PAGE AR-68051 INSTRUCTION SETAR.3.8 Predefined Symbols: SFR Bit Addresses---------- 4 BITS -------------- ---- ---- ----FC FFF8 FBF4 B.4 B.5 B.6 B.7 F7F0 B.0 B.1 B.2 B.3 F3EC EFE8 EBE4 ACC.4 ACC.5 ACC.6 ACC.7 E7E0 ACC.0 ACC.1 ACC.2 ACC.3 E3DC DFD8 DBD4 PSW.4 PSW.5 PSW.6 PSW.7 D7D0 PSW.0 PSW.1 PSW.2 PSW.3 D3CC [ T2CON.4 T2CON.5 T2CON.6 T2CON.7 ] CFC8 [ T2CON.0 T2CON.1 T2CON.2 T2CON.3 ] CBC4 C7C0 C3BC IP.4 IP.5 IP.6 IP.7 BFB8 IP.0 IP.1 IP.2 IP.3 BBB4 P3.4 P3.5 P3.6 P3.7 B7B0 P3.0 P3.1 P3.2 P3.3 B3AC IE.4 IE.5 EI.6 IE.7 AFA8 IE.0 IE.1 IE.2 IE.3 ABA4 P2.4 P2.5 P2.6 P2.7 A7A0 P2.0 P2.1 P2.2 P2.3 A39C SCON.4 SCON.5 SCON.6 SCON.7 9F98 SCON.0 SCON.1 SCON.2 SCON.3 9B94 P1.4 P1.5 P1.6 P1.7 9790 P1.0 P1.1 P1.2 P1.3 938C TCON.4 TCON.5 TCON.6 TCON.7 8F88 TCON.0 TCON.1 TCON.2 TCON.3 8B84 P0.4 P0.5 P0.6 P0.7 8780 P0.0 P0.1 P0.2 P0.3 83[...] Indicates Resident in 8052, not 8051A is an allowed alternate for ACC.AS8051 ASSEMBLER PAGE AR-78051 INSTRUCTION SETAR.3.9 Predefined Symbols: Control Bits---------- 4 BITS -------------- ---- ---- ----FC FFF8 FBF4 F7F0 F3EC EFE8 EBE4 E7E0 E3DC DFD8 DBD4 RS1 F0 AC CY D7D0 P OV RS0 D3CC [ TLCK RCLK EXF2 TF2 ] CFC8 [ CPRL2 CT2 TR2 EXEN2 ] CBC4 C7C0 C3BC PS PT2 BFB8 PX0 PT0 PX1 PT1 BBB4 B7B0 RXD TXD INT0 INT1 B3AC ES ET2 EA AFA8 EX0 ET0 EX1 ET1 ABA4 A7A0 A39C REN SM2 SM1 SM0 9F98 RI TI RB8 TB8 9B94 9790 938C TR0 TF0 TR1 TF1 8F88 IT0 IE0 IT1 IE1 8B84 8780 83[...] Indicates Resident in 8052, not 8051APPENDIX ATAS8XCXXX ASSEMBLERAT.1 ACKNOWLEDGMENTSThanks to Bill McKinnon for his contributions to the AS8XCXXXcross assembler.Bill McKinnonw_mckinnon at conknet dot comThis assembler was derived from the AS8051 cross assemblercontributed by John Hartman.John L. Hartmanjhartman at compuserve dot comnoice at noicedebugger dot comAT.2 AS8XCXXX ASSEMBLER DIRECTIVESAT.2.1 Processor Selection DirectivesThe AS8XCXXX assembler contains directives to specify theprocessor core SFR (Special Function Registers) and enable theSFR Bit Register values during the assembly process. The fol-lowing directives are supported:.DS8XCXXX ;80C32 core.DS80C310 ;Dallas Semiconductor.DS80C320 ;Microprocessors.DS80C323.DS80C390.DS83C520.DS83C530AS8XCXXX ASSEMBLER PAGE AT-2AS8XCXXX ASSEMBLER DIRECTIVES.DS83C550.DS87C520.DS87C530.DS87C550The invocation of one of the processor directives creates a pro-cessor specific symbol and an SFR-Bits symbol. For example thedirective.DS80C390creates the global symbols '__DS80C390' and '__SFR_BITS' eachwith a value of 1. If the microprocessor core selection direc-tive is followed by an optional argument then the symbol'__SFR_BITS' is given the value of the argument. The fileDS8XCXXX.SFR contains the SFR and SFR register bit values forall the microprocessor selector directives. This file may bemodified to create a new SFR for other microprocessor types.If a microprocessor selection directive is not specified thenno processor symbols will be defined. This mode allows the SFRand SFR register bit values to be defined by the assembly sourcefile.AT.2.2 .cpu DirectiveThe .cpu directive is similar to the processor selectiondirectives. This directive defines a new processor type andcreates a user defined symbol:.cpu "CP84C331" 2creates the symbol '__CP84C331' with a value of 1 and thesymbol '__SFR_BITS' with a value of 2. These values can be usedto select the processor SFR and SFR register bits from an in-clude file. If the optional final argument, 2, is omitted thenthe value of the symbol '__SFR_BITS' is 1.AS8XCXXX ASSEMBLER PAGE AT-3AS8XCXXX ASSEMBLER DIRECTIVESAT.2.3 Processor Addressing Range DirectivesIf one of the .DS8... microprocessor selection directives isnot specified then the following address range assembler direc-tives are accepted:.16bit ;16-Bit Addressing.24bit ;24-Bit Addressing.32bit ;32-Bit AddressingThese directives specify the assembler addressing space and ef-fect the output format for the .lst, .sym, and .rel files.The default addressing space for defined microprocessors is16-Bit except for the DS80C390 microprocessor which is 24-Bit.The .cpu directive defaults to the 16-Bit addressing rangebut this can be changed using these directives.AT.2.4 The .__.CPU. VariableThe value of the pre-defined symbol '.__.CPU.' corresponds tothe selected processor type. The default value is 0 which cor-responds to the default processor type. The following tablelists the processor types and associated values for the AS8XCXXXassembler:Processor Type .__.CPU. Value-------------- --------------.cpu 0.DS8XCXXX 1.DS80C310 2.DS80C320 3.DS80C323 4.DS80C390 5.DS83C520 6.DS83C530 7.DS83C550 8.DS87C520 9.DS87C530 10.DS87C550 11The variable '.__.CPU.' is by default defined as local andwill not be output to the created .rel file. The assembler com-mand line options -g or -a will not cause the local symbol to beoutput to the created .rel file.AS8XCXXX ASSEMBLER PAGE AT-4AS8XCXXX ASSEMBLER DIRECTIVESThe assembler .globl directive may be used to change thevariable type to global causing its definition to be output tothe .rel file. The inclusion of the definition of the variable'.__.CPU.' might be a useful means of validating that seperatelyassembled files have been compiled for the same processor type.The linker will report an error for variables with multiple nonequal definitions.AT.2.5 DS80C390 Addressing Mode DirectiveThe DS80C390 microprocessor supports 16-Bit and 24-Bit ad-dressing modes. The .amode assembler directive provides amethod to select the addressing mode used by the ajmp, acall,ljmp, and lcall instructions. These four instructions support16 and 24 bit addressing modes selected by bits AM0 and AM1 inthe ACON register. The assembler is 'informed' about the ad-dressing mode selected by using the .amode directive:.amode 2 ;mode 2 is 24-bit addressingIf a second argument is specified and its value is non-zero,then a three instruction sequence is inserted at the .amode lo-cation loading the mode bits into the ACON register:.amode 2,1 ;mode 2 is 24-bit addressing, load ACON;mov ta,#0xAA;mov ta,#0x55;mov acon,#amodeAT.2.6 The .msb DirectiveThe .msb directive is available in the AS8XCXXX assembler.The assembler operator '>' selects the upper byte (MSB) whenincluded in an assembler instruction. The default assemblermode is to select bits <15:8> as the MSB. The .msb directiveallows the programmer to specify a particular byte as the 'MSB'when the address space is larger than 16-bits.The assembler directive .msb n configures the assembler toselect a particular byte as MSB. Given a 24-bit address of Nmn(N(2) is <23:16>, m(1) is <15:8>, and n(0) is <7:0>) the follow-ing examples show how to select a particular address byte:.msb 1 ;select byte 1 of address;<M(3):N(2):m(1):n(0)>LD A,>MNmn ;byte m <15:8> ==>> AAS8XCXXX ASSEMBLER PAGE AT-5AS8XCXXX ASSEMBLER DIRECTIVES....msb 2 ;select byte 2 of address;<M(3):N(2):m(1):n(0)>LD A,>MNmn ;byte N <23:16> ==>> A...AS8XCXXX ASSEMBLER PAGE AT-6AS8XCXXX ASSEMBLER DIRECTIVESAT.3 DS8XCXXX REGISTER SETThe AS8XCXXX cross assembler supports the Dallas SemiconductorDS8XCXXX series of 8051-compatible devices. These microproces-sors retain instruction set and object code compatability withthe 8051 microprocessor. The DS8XCXXX family is updated withseveral new peripherals while providing all the standardfeatures of the 80C32 microprocessor.The following is a list of the registers used by AS8XCXXX:a,b - 8-bit accumulatorsr0,r1,r2,r3 - 8-bit registersr4,r5,r6,r7dptr - data pointersp - stack pointerpc - program counterpsw - status wordc - carry (bit in status word)AT.4 DS8XCXXX INSTRUCTION SETThe following tables list all DS8XCXXX mnemonics recognizedby the AS8XCXXX assembler. The following list specifies theformat for each addressing mode supported by AS8XCXXX:#data immediate databyte or word datar,r1,r2 register r0,r1,r2,r3,r4,r5,r6, or r7@r indirect on register r0 or r1@dptr indirect on data pointer@a+dptr indirect on accumulatorplus data pointer@a+pc indirect on accumulatorplus program counteraddr direct memory addressbitaddr bit addresslabel call or jump labelThe terms data, addr, bitaddr, and label may all be expressions.Note that not all addressing modes are valid with every in-struction. Refer to the DS8XCXXX technical data for validmodes.AS8XCXXX ASSEMBLER PAGE AT-7DS8XCXXX INSTRUCTION SETAT.4.1 Inherent InstructionsnopAT.4.2 Move Instructionsmov a,#data mov a,addrmov a,r mov a,@rmov r,#data mov r,addrmov r,amov addr,a mov addr,#datamov addr,r mov addr,@rmov addr1,addr2 mov bitaddr,cmov @r,#data mov @r,addrmov @r,amov c,bitaddrmov dptr,#datamovc a,@a+dptr movc a,@a+pcmovx a,@dptr movx a,@rmovx @dptr,a movx @r,aAT.4.3 Single Operand Instructionsclr a clr cclr bitaddrcpl a cpl ccpl bitaddrsetb c setb bitaddrda arr a rrc arl a rlc aswap adec a dec rdec @rinc a inc rinc dptr inc @rdiv ab mul abpop addr push addrAS8XCXXX ASSEMBLER PAGE AT-8DS8XCXXX INSTRUCTION SETAT.4.4 Two Operand Instructionsadd a,#data add a,addradd a,r add a,@raddc a,#data addc a,addraddc a,r addc a,@rsubb a,#data subb a,addrsubb a,r subb a,@rorl a,#data orl a,addrorl a,r orl a,@rorl addr,a orl addr,#dataorl c,bitaddr orl c,/bitaddranl a,#data anl a,addranl a,r anl a,@ranl addr,a anl addr,#dataanl c,bitaddr anl c,/bitaddrxrl a,#data xrl a,addrxrl a,r xrl a,@rxrl addr,a xrl addr,#dataxrl c,bitaddr xrl c,/bitaddrxch a,addr xch a,rxch a,@r xchd a,@rAT.4.5 Call and Return Instructionsacall label lcall labelret retiin dataout datarst dataAT.4.6 Jump Instructionsajmp labelcjne a,#data,label cjne a,addr,labelcjne r,#data,label cjne @r,#data,labeldjnz r,label djnz addr,labeljbc bitadr,labeljb bitadr,label jnb bitadr,labeljc label jnc labeljz label jnz labeljmp @a+dptrljmp label sjmp labelAS8XCXXX ASSEMBLER PAGE AT-9DS8XCXXX INSTRUCTION SETAT.5 DS8XCXXX SPECIAL FUNCTION REGISTERSThe 80C32 core Special Function Registers are selected usingthe .DS8XCXXX assembler directive.AT.5.1 SFR Map--------- 4 Bytes -------------- ---- ---- ----80 SP DPL DPH 8384 PCON 8788 TCON TMOD TL0 TL1 8B8C TH0 TH1 8F90 P1 9394 9798 SCON SBUF 9B9C 9FA0 P2 A3A4 A7A8 IE SADDR0 ABAC AFB0 P3 B3B4 B7B8 IP SADEN0 BBBC BFC0 C3C4 STATUS C7C8 T2CON T2MOD RCAP2L RCAP2H CBCC TL2 TH2 CFD0 PSW D3D4 D7D8 DBDC DFE0 ACC E3E4 E7E8 EBEC EFF0 B F3F4 F7F8 FBFC FFAS8XCXXX ASSEMBLER PAGE AT-10DS8XCXXX SPECIAL FUNCTION REGISTERSAT.5.2 Bit Addressable Registers: Generic---------- 4 BITS -------------- ---- ---- ----80 8384 87TCON 88 TCON.0 TCON.1 TCON.2 TCON.3 8B8C TCON.4 TCON.5 TCON.6 TCON.7 8FP1 90 P1.0 P1.1 P1.2 P1.3 9394 P1.4 P1.5 P1.6 P1.7 97SCON 98 SCON.0 SCON.1 SCON.2 SCON.3 9B9C SCON.4 SCON.5 SCON.6 SCON.7 9FP2 A0 P2.0 P2.1 P2.2 P2.3 A3A4 P2.4 P2.5 P2.6 P2.7 A7IE A8 IE.0 IE.1 IE.2 IE.3 ABAC IE.4 IE.5 EI.6 IE.7 AFP3 B0 P3.0 P3.1 P3.2 P3.3 B3B4 P3.4 P3.5 P3.6 P3.7 B7IP B8 IP.0 IP.1 IP.2 IP.3 BBBC IP.4 IP.5 IP.6 IP.7 BFC0 C3C4 C7T2CON C8 T2CON.0 T2CON.1 T2CON.2 T2CON.3 CBCC T2CON.4 T2CON.5 T2CON.6 T2CON.7 CFPSW D0 PSW.0 PSW.1 PSW.2 PSW.3 D3D4 PSW.4 PSW.5 PSW.6 PSW.7 D7D8 DBDC DFACC E0 ACC.0 ACC.1 ACC.2 ACC.3 E3E4 ACC.4 ACC.5 ACC.6 ACC.7 E7E8 EBEC EFB F0 B.0 B.1 B.2 B.3 F3F4 B.4 B.5 B.6 B.7 F7F8 FBFC FFAS8XCXXX ASSEMBLER PAGE AT-11DS8XCXXX SPECIAL FUNCTION REGISTERSAT.5.3 Bit Addressable Registers: Specific---------- 4 BITS -------------- ---- ---- ----80 8384 87TCON 88 IT0 IE0 IT1 IE1 8B8C TR0 TF0 TR1 TF1 8F90 9394 97SCON 98 RI TI RB8 TB8 9B9C REN SM2 SM1 SMO 9FA0 A3A4 A7IE A8 EX0 ET0 EX1 ET1 ABAC ES0 ET2 EA AFB0 B3B4 B7IP B8 PX0 PT0 PX1 PT1 BBBC PS0 PT2 BFC0 C3C4 C7T2CON C8 CPRL2 CT2 TR2 EXEN2 CBCC TCLK RCLK EXF2 TF2 CFPSW D0 P FL OV RS0 D3D4 RS1 F0 AC CY D7D8 DBDC DFE0 E3E4 E7E8 EBEC EFF0 F3F4 F7F8 FBFC FFAlternates:SCON 98 9B9C FE 9FT2CON C8 CP_RL2 C_T2 CBCC CFAS8XCXXX ASSEMBLER PAGE AT-12DS8XCXXX SPECIAL FUNCTION REGISTERSAT.5.4 Optional Symbols: Control Bits---------- 4 BITS -------------- ---- ---- ----0x80 0x40 0x20 0x100x08 0x04 0x02 0x10---- ---- ---- ----PCON 0x80 SMOD SMOD0 0x100x08 GF1 GF0 STOP IDLE 0x01TMOD 0x80 T1GATE T1C_T T1M1 T1M0 0x100x08 T0GATE T0C_T T0M1 T0M0 0x01STATUS 0x80 HIP LIP 0x100x08 0x01T2MOD 0x80 0x100x08 T2OE DCEN 0x01AS8XCXXX ASSEMBLER PAGE AT-13DS8XCXXX SPECIAL FUNCTION REGISTERSAT.6 DS80C310 SPECIAL FUNCTION REGISTERSThe DS80C310 Special Function Registers are selected usingthe .DS80C310 assembler directive.AT.6.1 SFR Map--------- 4 Bytes -------------- ---- ---- ----80 SP DPL DPH 8384 DPL1 DPH1 DPS PCON 8788 TCON TMOD TL0 TL1 8B8C TH0 TH1 CKCON 8F90 P1 EXIF 9394 9798 SCON SBUF 9B9C 9FA0 P2 A3A4 A7A8 IE SADDR0 ABAC AFB0 P3 B3B4 B7B8 IP SADEN0 BBBC BFC0 C3C4 STATUS C7C8 T2CON T2MOD RCAP2L RCAP2H CBCC TL2 TH2 CFD0 PSW D3D4 D7D8 WDCON DBDC DFE0 ACC E3E4 E7E8 EIE EBEC EFF0 B F3F4 F7F8 EIP FBFC FFAS8XCXXX ASSEMBLER PAGE AT-14DS80C310 SPECIAL FUNCTION REGISTERSAT.6.2 Bit Addressable Registers: Generic---------- 4 BITS -------------- ---- ---- ----80 8384 87TCON 88 TCON.0 TCON.1 TCON.2 TCON.3 8B8C TCON.4 TCON.5 TCON.6 TCON.7 8FP1 90 P1.0 P1.1 P1.2 P1.3 9394 P1.4 P1.5 P1.6 P1.7 97SCON 98 SCON.0 SCON.1 SCON.2 SCON.3 9B9C SCON.4 SCON.5 SCON.6 SCON.7 9FP2 A0 P2.0 P2.1 P2.2 P2.3 A3A4 P2.4 P2.5 P2.6 P2.7 A7IE A8 IE.0 IE.1 IE.2 IE.3 ABAC IE.4 IE.5 EI.6 IE.7 AFP3 B0 P3.0 P3.1 P3.2 P3.3 B3B4 P3.4 P3.5 P3.6 P3.7 B7IP B8 IP.0 IP.1 IP.2 IP.3 BBBC IP.4 IP.5 IP.6 IP.7 BFC0 C3C4 C7T2CON C8 T2CON.0 T2CON.1 T2CON.2 T2CON.3 CBCC T2CON.4 T2CON.5 T2CON.6 T2CON.7 CFPSW D0 PSW.0 PSW.1 PSW.2 PSW.3 D3D4 PSW.4 PSW.5 PSW.6 PSW.7 D7WDCON D8 WDCON.0 WDCON.1 WDCON.2 WDCON.3 DBDC WDCON.4 WDCON.5 WDCON.6 WDCON.7 DFACC E0 ACC.0 ACC.1 ACC.2 ACC.3 E3E4 ACC.4 ACC.5 ACC.6 ACC.7 E7EIE E8 EIE.0 EIE.1 EIE.2 EIE.3 EBEC EIE.4 EIE.5 EIE.6 EIE.7 EFB F0 B.0 B.1 B.2 B.3 F3F4 B.4 B.5 B.6 B.7 F7EIP F8 EIP.0 EIP.1 EIP.2 EIP.3 FBFC EIP.4 EIP.5 EIP.6 EIP.7 FFAS8XCXXX ASSEMBLER PAGE AT-15DS80C310 SPECIAL FUNCTION REGISTERSAT.6.3 Bit Addressable Registers: Specific---------- 4 BITS -------------- ---- ---- ----80 8384 87TCON 88 IT0 IE0 IT1 IE1 8B8C TR0 TF0 TR1 TF1 8F90 9394 97SCON 98 RI TI RB8 TB8 9B9C REN SM2 SM1 SMO 9FA0 A3A4 A7IE A8 EX0 ET0 EX1 ET1 ABAC ES0 ET2 EA AFB0 B3B4 B7IP B8 PX0 PT0 PX1 PT1 BBBC PS0 PT2 BFC0 C3C4 C7T2CON C8 CPRL2 CT2 TR2 EXEN2 CBCC TCLK RCLK EXF2 TF2 CFPSW D0 P FL OV RS0 D3D4 RS1 F0 AC CY D7WDCON D8 DBDC POR DFE0 E3E4 E7EIE E8 EX2 EX3 EX4 EX5 EBEC EFF0 F3F4 F7EIP F8 PX2 PX3 PX4 PX5 FBFC FFAlternates:SCON 98 9B9C FE 9FT2CON C8 CP_RL2 C_T2 CBCC CFAS8XCXXX ASSEMBLER PAGE AT-16DS80C310 SPECIAL FUNCTION REGISTERSAT.6.4 Optional Symbols: Control Bits---------- 4 BITS -------------- ---- ---- ----0x80 0x40 0x20 0x100x08 0x04 0x02 0x10---- ---- ---- ----DPS 0x80 0x100x08 SEL 0x01PCON 0x80 SMOD SMOD0 0x100x08 GF1 GF0 STOP IDLE 0x01TMOD 0x80 T1GATE T1C_T T1M1 T1M0 0x100x08 T0GATE T0C_T T0M1 T0M0 0x01CKCON 0x80 T2M T1M 0x100x08 T0M MD2 MD1 MD0 0x01EXIF 0x80 IE5 IE4 IE3 IE2 0x100x08 0x01STATUS 0x80 HIP LIP 0x100x08 0x01T2MOD 0x80 0x100x08 T2OE DCEN 0x01Alternates:PCON 0x80 SMOD_0 0x100x08 0x01AS8XCXXX ASSEMBLER PAGE AT-17DS80C310 SPECIAL FUNCTION REGISTERSAT.7 DS80C320/DS80C323 SPECIAL FUNCTION REGISTERSThe DS80C320/DS80C323 Special Function Registers are selectedusing the .DS80C320 or DS80C323 assembler directives.AT.7.1 SFR Map--------- 4 Bytes -------------- ---- ---- ----80 SP DPL DPH 8384 DPL1 DPH1 DPS PCON 8788 TCON TMOD TL0 TL1 8B8C TH0 TH1 CKCON 8F90 P1 EXIF 9394 9798 SCON0 SBUF0 9B9C 9FA0 P2 A3A4 A7A8 IE SADDR0 ABAC AFB0 P3 B3B4 B7B8 IP SADEN0 BBBC BFC0 SCON1 SBUF1 C3C4 STATUS TA C7C8 T2CON T2MOD RCAP2L RCAP2H CBCC TL2 TH2 CFD0 PSW D3D4 D7D8 WDCON DBDC DFE0 ACC E3E4 E7E8 EIE EBEC EFF0 B F3F4 F7F8 EIP FBFC FFAlternates:98 SCON SBUF 9BAS8XCXXX ASSEMBLER PAGE AT-18DS80C320/DS80C323 SPECIAL FUNCTION REGISTERSAT.7.2 Bit Addressable Registers: Generic---------- 4 BITS -------------- ---- ---- ----80 8384 87TCON 88 TCON.0 TCON.1 TCON.2 TCON.3 8B8C TCON.4 TCON.5 TCON.6 TCON.7 8FP1 90 P1.0 P1.1 P1.2 P1.3 9394 P1.4 P1.5 P1.6 P1.7 97SCON0 98 SCON0.0 SCON0.1 SCON0.2 SCON0.3 9B9C SCON0.4 SCON0.5 SCON0.6 SCON0.7 9FP2 A0 P2.0 P2.1 P2.2 P2.3 A3A4 P2.4 P2.5 P2.6 P2.7 A7IE A8 IE.0 IE.1 IE.2 IE.3 ABAC IE.4 IE.5 EI.6 IE.7 AFP3 B0 P3.0 P3.1 P3.2 P3.3 B3B4 P3.4 P3.5 P3.6 P3.7 B7IP B8 IP.0 IP.1 IP.2 IP.3 BBBC IP.4 IP.5 IP.6 IP.7 BFSCON1 C0 SCON1.0 SCON1.1 SCON1.2 SCON1.3 C3C4 SCON1.4 SCON1.5 SCON1.6 SCON1.7 C7T2CON C8 T2CON.0 T2CON.1 T2CON.2 T2CON.3 CBCC T2CON.4 T2CON.5 T2CON.6 T2CON.7 CFPSW D0 PSW.0 PSW.1 PSW.2 PSW.3 D3D4 PSW.4 PSW.5 PSW.6 PSW.7 D7WDCON D8 WDCON.0 WDCON.1 WDCON.2 WDCON.3 DBDC WDCON.4 WDCON.5 WDCON.6 WDCON.7 DFACC E0 ACC.0 ACC.1 ACC.2 ACC.3 E3E4 ACC.4 ACC.5 ACC.6 ACC.7 E7EIE E8 EIE.0 EIE.1 EIE.2 EIE.3 EBEC EIE.4 EIE.5 EIE.6 EIE.7 EFB F0 B.0 B.1 B.2 B.3 F3F4 B.4 B.5 B.6 B.7 F7EIP F8 EIP.0 EIP.1 EIP.2 EIP.3 FBFC EIP.4 EIP.5 EIP.6 EIP.7 FFAlternates:SCON 98 SCON.0 SCON.1 SCON.2 SCON.3 9B9C SCON.4 SCON.5 SCON.6 SCON.7 9FAS8XCXXX ASSEMBLER PAGE AT-19DS80C320/DS80C323 SPECIAL FUNCTION REGISTERSAT.7.3 Bit Addressable Registers: Specific---------- 4 BITS -------------- ---- ---- ----80 8384 87TCON 88 IT0 IE0 IT1 IE1 8B8C TR0 TF0 TR1 TF1 8F90 9394 97SCON0 98 RI_0 TI_0 RB8_0 TB8_0 9B9C REN_0 SM2_0 SM1_0 SMO_0 9FA0 A3A4 A7IE A8 EX0 ET0 EX1 ET1 ABAC ES0 ET2 EA AFB0 B3B4 B7IP B8 PX0 PT0 PX1 PT1 BBBC PS0 PT2 BFSCON1 C0 RI_1 TI_1 RB8_1 TB8_1 C3C4 REN_1 SM2_1 SM1_1 SMO_1 C7T2CON C8 CPRL2 CT2 TR2 EXEN2 CBCC TCLK RCLK EXF2 TF2 CFPSW D0 P FL OV RS0 D3D4 RS1 F0 AC CY D7WDCON D8 RWT EWT WTRF WDIF DBDC PFI EPFI POR SMOD_1 DFE0 E3E4 E7EIE E8 EX2 EX3 EX4 EX5 EBEC EWDI EFF0 F3F4 F7EIP F8 PX2 PX3 PX4 PX5 FBFC PWDI FFAlternates:SCON 98 RI TI RB8 TB8 9B9C REN SM2 SM1 SMO 9FSCON 98 9B9C FE 9FSCON0 98 9B9C FE_0 9FSCON1 C0 C3C4 FE_1 C7T2CON C8 CP_RL2 C_T2 CBCC CFAS8XCXXX ASSEMBLER PAGE AT-20DS80C320/DS80C323 SPECIAL FUNCTION REGISTERSAT.7.4 Optional Symbols: Control Bits---------- 4 BITS -------------- ---- ---- ----0x80 0x40 0x20 0x100x08 0x04 0x02 0x10---- ---- ---- ----DPS 0x80 0x100x08 SEL 0x01PCON 0x80 SMOD_0 SMOD0 0x100x08 GF1 GF0 STOP IDLE 0x01TMOD 0x80 T1GATE T1C_T T1M1 T1M0 0x100x08 T0GATE T0C_T T0M1 T0M0 0x01CKCON 0x80 WD1 WD0 T2M T1M 0x100x08 T0M MD2 MD1 MD0 0x01EXIF 0x80 IE5 IE4 IE3 IE2 0x100x08 RGMD RGSL BGS 0x01STATUS 0x80 PIP HIP LIP 0x100x08 0x01T2MOD 0x80 0x100x08 T2OE DCEN 0x01Alternates:PCON 0x80 SMOD 0x100x08 0x01AS8XCXXX ASSEMBLER PAGE AT-21DS80C320/DS80C323 SPECIAL FUNCTION REGISTERSAT.8 DS80C390 SPECIAL FUNCTION REGISTERSThe DS80C390 Special Function Registers are selected usingthe .DS80C390 assembler directive.AT.8.1 SFR Map--------- 4 Bytes -------------- ---- ---- ----80 P4 SP DPL DPH 8384 DPL1 DPH1 DPS PCON 8788 TCON TMOD TL0 TL1 8B8C TH0 TH1 CKCON 8F90 P1 EXIF P4CNT DPX 9394 DPX1 C0RMS0 C0RMS1 9798 SCON0 SBUF0 ESP 9B9C AP ACON C0TMA0 C0TMA1 9FA0 P2 P5 P5CNT C0C A3A4 C0S C0IR C0TE C0RE A7A8 IE SADDR0 SADDR1 C0M1C ABAC C0M2C C0M3C C0M4C C0M5C AFB0 P3 C0M6C B3B4 C0M7C C0M8C C0M9C C0M10C B7B8 IP SADEN0 SADEN1 C0M11C BBBC C0M12C C0M13C C0M14C C0M15C BFC0 SCON1 SBUF1 C3C4 PMR STATUS MCON TA C7C8 T2CON T2MOD RCAP2L RCAP2H CBCC TL2 TH2 COR CFD0 PSW MCNT0 MCNT1 MA D3D4 MB MC C1RMS0 C1RMS1 D7D8 WDCON DBDC C1TMA0 C1TMA1 DFE0 ACC C1C E3E4 C1S C1IR C1TE C1RE E7E8 EIE MXAX C1M1C EBEC C1M2C C1M3C C1M4C C1M5C EFF0 B C1M6C F3F4 C1M7C C1M8C C1M9C C1M10C F7F8 EIP C1M11C FBFC C1M12C C1M13C C1M14C C1M15C FFAlternates:98 SCON SBUF 9BAS8XCXXX ASSEMBLER PAGE AT-22DS80C390 SPECIAL FUNCTION REGISTERSAT.8.2 Bit Addressable Registers: Generic---------- 4 BITS -------------- ---- ---- ----P4 80 P4.0 P4.1 P4.2 P4.3 8384 P4.4 P4.5 P4.6 P4.7 87TCON 88 TCON.0 TCON.1 TCON.2 TCON.3 8B8C TCON.4 TCON.5 TCON.6 TCON.7 8FP1 90 P1.0 P1.1 P1.2 P1.3 9394 P1.4 P1.5 P1.6 P1.7 97SCON0 98 SCON0.0 SCON0.1 SCON0.2 SCON0.3 9B9C SCON0.4 SCON0.5 SCON0.6 SCON0.7 9FP2 A0 P2.0 P2.1 P2.2 P2.3 A3A4 P2.4 P2.5 P2.6 P2.7 A7IE A8 IE.0 IE.1 IE.2 IE.3 ABAC IE.4 IE.5 EI.6 IE.7 AFP3 B0 P3.0 P3.1 P3.2 P3.3 B3B4 P3.4 P3.5 P3.6 P3.7 B7IP B8 IP.0 IP.1 IP.2 IP.3 BBBC IP.4 IP.5 IP.6 IP.7 BFSCON1 C0 SCON1.0 SCON1.1 SCON1.2 SCON1.3 C3C4 SCON1.4 SCON1.5 SCON1.6 SCON1.7 C7T2CON C8 T2CON.0 T2CON.1 T2CON.2 T2CON.3 CBCC T2CON.4 T2CON.5 T2CON.6 T2CON.7 CFPSW D0 PSW.0 PSW.1 PSW.2 PSW.3 D3D4 PSW.4 PSW.5 PSW.6 PSW.7 D7WDCON D8 WDCON.0 WDCON.1 WDCON.2 WDCON.3 DBDC WDCON.4 WDCON.5 WDCON.6 WDCON.7 DFACC E0 ACC.0 ACC.1 ACC.2 ACC.3 E3E4 ACC.4 ACC.5 ACC.6 ACC.7 E7EIE E8 EIE.0 EIE.1 EIE.2 EIE.3 EBEC EIE.4 EIE.5 EIE.6 EIE.7 EFB F0 B.0 B.1 B.2 B.3 F3F4 B.4 B.5 B.6 B.7 F7EIP F8 EIP.0 EIP.1 EIP.2 EIP.3 FBFC EIP.4 EIP.5 EIP.6 EIP.7 FFAlternates:SCON 98 SCON.0 SCON.1 SCON.2 SCON.3 9B9C SCON.4 SCON.5 SCON.6 SCON.7 9FAS8XCXXX ASSEMBLER PAGE AT-23DS80C390 SPECIAL FUNCTION REGISTERSAT.8.3 Bit Addressable Registers: Specific---------- 4 BITS -------------- ---- ---- ----80 8384 87TCON 88 IT0 IE0 IT1 IE1 8B8C TR0 TF0 TR1 TF1 8FP1 90 T2 T2EX RXD1 TXD1 9394 INT2 INT3 INT4 INT5 97SCON0 98 RI_0 TI_0 RB8_0 TB8_0 9B9C REN_0 SM2_0 SM1_0 SMO_0 9FA0 A3A4 A7IE A8 EX0 ET0 EX1 ET1 ABAC ES0 ET2 ES1 EA AFP3 B0 RXD0 TXD0 INT0 INT1 B3B4 T0 T1 B7IP B8 PX0 PT0 PX1 PT1 BBBC PS0 PT2 PS1 BFSCON1 C0 RI_1 TI_1 RB8_1 TB8_1 C3C4 REN_1 SM2_1 SM1_1 SMO_1 C7T2CON C8 CPRL2 CT2 TR2 EXEN2 CBCC TCLK RCLK EXF2 TF2 CFPSW D0 P FL OV RS0 D3D4 RS1 F0 AC CY D7WDCON D8 RWT EWT WTRF WDIF DBDC PFI EPFI POR SMOD_1 DFE0 E3E4 E7EIE E8 EX2 EX3 EX4 EX5 EBEC EWDI C1IE C0IE CANBIE EFF0 F3F4 F7EIP F8 PX2 PX3 PX4 PX5 FBFC PWDI C1IP C0IP CANBIP FFAlternates:SCON 98 RI TI RB8 TB8 9B9C REN SM2 SM1 SMO 9FSCON 98 9B9C FE 9FSCON0 98 9B9C FE_0 9FSCON1 C0 C3C4 FE_1 C7T2CON C8 CP_RL2 C_T2 CBCC CFAS8XCXXX ASSEMBLER PAGE AT-24DS80C390 SPECIAL FUNCTION REGISTERSAT.8.4 Optional Symbols: Control Bits---------- 4 BITS -------------- ---- ---- ----0x80 0x40 0x20 0x100x08 0x04 0x02 0x10---- ---- ---- ----DPS 0x80 ID1 ID0 TSL 0x100x08 SEL 0x01PCON 0x80 SMOD_0 SMOD0 OFDF OFDE 0x100x08 GF1 GF0 STOP IDLE 0x01TMOD 0x80 T1GATE T1C_T T1M1 T1M0 0x100x08 T0GATE T0C_T T0M1 T0M0 0x01CKCON 0x80 WD1 WD0 T2M T1M 0x100x08 T0M MD2 MD1 MD0 0x01EXIF 0x80 IE5 IE4 IE3 IE2 0x100x08 CKRY RGMD RGSL BGS 0x01P4CNT 0x80 SBCAN 0x100x08 0x01ESP 0x80 0x100x08 ESP.1 ESP.0 0x01ACON 0x80 0x100x08 SA AM1 AM0 0x01P5 0x80 P5.7 P5.6 P5.5 P5.4 0x100x08 P5.3 P5.2 P5.1 P5.0 0x01P5CNT 0x80 CAN1BA CAN0BA SP1EC C1_IO 0x100x08 C0_IO P5CNT.2 P5CNT.1 P5CNT.0 0x01CxC 0x80 ERIE STIE PDE SIESTA 0x100x08 CRST AUTOB ERCS SWINT 0x01CxS 0x80 BSS EC96_128 WKS RXS 0x100x08 TXS ER2 ER1 ER0 0x01CxIR 0x80 INTIN7 INTIN6 INTIN5 INTIN4 0x100x08 INTIN3 INTIN2 INTIN1 INTIN0 0x01CxCxxC 0x80 MSRDY ET1 ER1 INTRQ 0x100x08 EXTRQ MTRQ ROW_TIH DTUP 0x01PMR 0x80 CD1 CD0 SWB CTM 0x100x08 4X_2X ALEOFF 0x01STATUS 0x80 PIP HIP LIP 0x100x08 SPTA1 SPRA1 SPTA0 SPRA0 0x01MCON 0x80 IDM1 IDM0 CMA 0x100x08 PDCE3 PDCE2 PDCE1 PDCE0 0x01T2MOD 0x80 D13T1 0x100x08 D13T2 T2OE DCEN 0x01COR 0x80 IRDACK C1BPR7 C1BPR6 C0BPR7 0x100x08 C0BPR6 COD1 COD0 CLKOE 0x01MCNT0 0x80 _LSHIFT CSE SCB MAS4 0x100x08 MAS3 MAS2 MAS1 MAS0 0x01MCNT1 0x80 MST MOF CLM 0x100x08 0x01Alternates:AS8XCXXX ASSEMBLER PAGE AT-25DS80C390 SPECIAL FUNCTION REGISTERSPCON 0x80 SMOD 0x100x08 0x01AS8XCXXX ASSEMBLER PAGE AT-26DS80C390 SPECIAL FUNCTION REGISTERSAT.9 DS83C520/DS87C520 SPECIAL FUNCTION REGISTERSThe DS83C520/DS87C520 Special Function Registers are selectedusing the .DS83C520 or DS87C520 assembler directives.AT.9.1 SFR Map--------- 4 Bytes -------------- ---- ---- ----80 P0 SP DPL DPH 8384 DPL1 DPH1 DPS PCON 8788 TCON TMOD TL0 TL1 8B8C TH0 TH1 CKCON 8F90 PORT1 EXIF 9394 9798 SCON0 SBUF0 9B9C 9FA0 P2 A3A4 A7A8 IE SADDR0 SADDR1 ABAC AFB0 P3 B3B4 B7B8 IP SADEN0 SADEN1 BBBC BFC0 SCON1 SBUF1 ROMSIZE C3C4 PMR STATUS TA C7C8 T2CON T2MOD RCAP2L RCAP2H CBCC TL2 TH2 CFD0 PSW D3D4 D7D8 WDCON DBDC DFE0 ACC E3E4 E7E8 EIE EBEC EFF0 B F3F4 F7F8 EIP FBFC FFAlternates:98 SCON SBUF 9BAS8XCXXX ASSEMBLER PAGE AT-27DS83C520/DS87C520 SPECIAL FUNCTION REGISTERSAT.9.2 Bit Addressable Registers: Generic---------- 4 BITS -------------- ---- ---- ----P0 80 P0.7 P0.6 P0.5 P0.4 8384 P0.3 P0.2 P0.1 P0.0 87TCON 88 TCON.0 TCON.1 TCON.2 TCON.3 8B8C TCON.4 TCON.5 TCON.6 TCON.7 8FPORT1 90 P1.0 P1.1 P1.2 P1.3 9394 P1.4 P1.5 P1.6 P1.7 97SCON0 98 SCON0.0 SCON0.1 SCON0.2 SCON0.3 9B9C SCON0.4 SCON0.5 SCON0.6 SCON0.7 9FP2 A0 P2.0 P2.1 P2.2 P2.3 A3A4 P2.4 P2.5 P2.6 P2.7 A7IE A8 IE.0 IE.1 IE.2 IE.3 ABAC IE.4 IE.5 EI.6 IE.7 AFP3 B0 P3.0 P3.1 P3.2 P3.3 B3B4 P3.4 P3.5 P3.6 P3.7 B7IP B8 IP.0 IP.1 IP.2 IP.3 BBBC IP.4 IP.5 IP.6 IP.7 BFSCON1 C0 SCON1.0 SCON1.1 SCON1.2 SCON1.3 C3C4 SCON1.4 SCON1.5 SCON1.6 SCON1.7 C7T2CON C8 T2CON.0 T2CON.1 T2CON.2 T2CON.3 CBCC T2CON.4 T2CON.5 T2CON.6 T2CON.7 CFPSW D0 PSW.0 PSW.1 PSW.2 PSW.3 D3D4 PSW.4 PSW.5 PSW.6 PSW.7 D7WDCON D8 WDCON.0 WDCON.1 WDCON.2 WDCON.3 DBDC WDCON.4 WDCON.5 WDCON.6 WDCON.7 DFACC E0 ACC.0 ACC.1 ACC.2 ACC.3 E3E4 ACC.4 ACC.5 ACC.6 ACC.7 E7EIE E8 EIE.0 EIE.1 EIE.2 EIE.3 EBEC EIE.4 EIE.5 EIE.6 EIE.7 EFB F0 B.0 B.1 B.2 B.3 F3F4 B.4 B.5 B.6 B.7 F7EIP F8 EIP.0 EIP.1 EIP.2 EIP.3 FBFC EIP.4 EIP.5 EIP.6 EIP.7 FFAlternates:PORT1 90 PORT1.0 PORT1.1 PORT1.2 PORT1.3 9394 PORT1.4 PORT1.5 PORT1.6 PORT1.7 97SCON 98 SCON.0 SCON.1 SCON.2 SCON.3 9B9C SCON.4 SCON.5 SCON.6 SCON.7 9FAS8XCXXX ASSEMBLER PAGE AT-28DS83C520/DS87C520 SPECIAL FUNCTION REGISTERSAT.9.3 Bit Addressable Registers: Specific---------- 4 BITS -------------- ---- ---- ----80 8384 87TCON 88 IT0 IE0 IT1 IE1 8B8C TR0 TF0 TR1 TF1 8F90 9394 97SCON0 98 RI_0 TI_0 RB8_0 TB8_0 9B9C REN_0 SM2_0 SM1_0 SMO_0 9FA0 A3A4 A7IE A8 EX0 ET0 EX1 ET1 ABAC ES0 ET2 ES1 EA AFB0 B3B4 B7IP B8 PX0 PT0 PX1 PT1 BBBC PS0 PT2 PS1 BFSCON1 C0 RI_1 TI_1 RB8_1 TB8_1 C3C4 REN_1 SM2_1 SM1_1 SMO_1 C7T2CON C8 CPRL2 CT2 TR2 EXEN2 CBCC TCLK RCLK EXF2 TF2 CFPSW D0 P FL OV RS0 D3D4 RS1 F0 AC CY D7WDCON D8 RWT EWT WTRF WDIF DBDC PFI EPFI POR SMOD_1 DFE0 E3E4 E7EIE E8 EX2 EX3 EX4 EX5 EBEC EWDI EFF0 F3F4 F7EIP F8 PX2 PX3 PX4 PX5 FBFC PWDI FFAlternates:SCON 98 RI TI RB8 TB8 9B9C REN SM2 SM1 SMO 9FSCON 98 9B9C FE 9FSCON0 98 9B9C FE_0 9FSCON1 C0 C3C4 FE_1 C7T2CON C8 CP_RL2 C_T2 CBCC CFAS8XCXXX ASSEMBLER PAGE AT-29DS83C520/DS87C520 SPECIAL FUNCTION REGISTERSAT.9.4 Optional Symbols: Control Bits---------- 4 BITS -------------- ---- ---- ----0x80 0x40 0x20 0x100x08 0x04 0x02 0x10---- ---- ---- ----DPS 0x80 0x100x08 SEL 0x01PCON 0x80 SMOD_0 SMOD0 0x100x08 GF1 GF0 STOP IDLE 0x01TMOD 0x80 T1GATE T1C_T T1M1 T1M0 0x100x08 T0GATE T0C_T T0M1 T0M0 0x01CKCON 0x80 WD1 WD0 T2M T1M 0x100x08 T0M MD2 MD1 MD0 0x01EXIF 0x80 IE5 IE4 IE3 IE 0x100x08 XT_RG RGMD RGSL BGS 0x01SBUF1 0x80 SB7 SB6 SB5 SB4 0x100x08 SB3 SB2 SB1 SB0 0x01ROMSIZE 0x80 0x100x08 RMS2 RMS1 RMS0 0x01PMR 0x80 CD1 CD0 SWB 0x100x08 XTOFF ALEOFF DME1 DME0 0x01STATUS 0x80 PIP HIP LIP XTUP 0x100x08 SPTA1 SPRA1 SPTA0 SPRA0 0x01T2MOD 0x80 0x100x08 T2OE DCEN 0x01Alternates:PCON 0x80 SMOD 0x100x08 0x01AS8XCXXX ASSEMBLER PAGE AT-30DS83C520/DS87C520 SPECIAL FUNCTION REGISTERSAT.10 DS83C530/DS87C530 SPECIAL FUNCTION REGISTERSThe DS83C530/DS87C530 Special Function Registers are selectedusing the .DS83C530 or DS87C530 assembler directives.AT.10.1 SFR Map--------- 4 Bytes -------------- ---- ---- ----80 P0 SP DPL DPH 8384 DPL1 DPH1 DPS PCON 8788 TCON TMOD TL0 TL1 8B8C TH0 TH1 CKCON 8F90 P1 EXIF 9394 TRIM 9798 SCON0 SBUF0 9B9C 9FA0 P2 A3A4 A7A8 IE SADDR0 SADDR1 ABAC AFB0 P3 B3B4 B7B8 IP SADEN0 SADEN1 BBBC BFC0 SCON1 SBUF1 ROMSIZE C3C4 PMR STATUS TA C7C8 T2CON T2MOD RCAP2L RCAP2H CBCC TL2 TH2 CFD0 PSW D3D4 D7D8 WDCON DBDC DFE0 ACC E3E4 E7E8 EIE EBEC EFF0 B RTASS RTAS F3F4 RTAM RTAH F7F8 EIP RTCC RTCSS RTCS FBFC RTCM RTCH RTCD0 RTCD1 FFAlternates:98 SCON SBUF 9BAS8XCXXX ASSEMBLER PAGE AT-31DS83C530/DS87C530 SPECIAL FUNCTION REGISTERSAT.10.2 Bit Addressable Registers: Generic---------- 4 BITS -------------- ---- ---- ----P0 80 P0.7 P0.6 P0.5 P0.4 8384 P0.3 P0.2 P0.1 P0.0 87TCON 88 TCON.0 TCON.1 TCON.2 TCON.3 8B8C TCON.4 TCON.5 TCON.6 TCON.7 8FP1 90 P1.0 P1.1 P1.2 P1.3 9394 P1.4 P1.5 P1.6 P1.7 97SCON0 98 SCON0.0 SCON0.1 SCON0.2 SCON0.3 9B9C SCON0.4 SCON0.5 SCON0.6 SCON0.7 9FP2 A0 P2.0 P2.1 P2.2 P2.3 A3A4 P2.4 P2.5 P2.6 P2.7 A7IE A8 IE.0 IE.1 IE.2 IE.3 ABAC IE.4 IE.5 EI.6 IE.7 AFP3 B0 P3.0 P3.1 P3.2 P3.3 B3B4 P3.4 P3.5 P3.6 P3.7 B7IP B8 IP.0 IP.1 IP.2 IP.3 BBBC IP.4 IP.5 IP.6 IP.7 BFSCON1 C0 SCON1.0 SCON1.1 SCON1.2 SCON1.3 C3C4 SCON1.4 SCON1.5 SCON1.6 SCON1.7 C7T2CON C8 T2CON.0 T2CON.1 T2CON.2 T2CON.3 CBCC T2CON.4 T2CON.5 T2CON.6 T2CON.7 CFPSW D0 PSW.0 PSW.1 PSW.2 PSW.3 D3D4 PSW.4 PSW.5 PSW.6 PSW.7 D7WDCON D8 WDCON.0 WDCON.1 WDCON.2 WDCON.3 DBDC WDCON.4 WDCON.5 WDCON.6 WDCON.7 DFACC E0 ACC.0 ACC.1 ACC.2 ACC.3 E3E4 ACC.4 ACC.5 ACC.6 ACC.7 E7EIE E8 EIE.0 EIE.1 EIE.2 EIE.3 EBEC EIE.4 EIE.5 EIE.6 EIE.7 EFB F0 B.0 B.1 B.2 B.3 F3F4 B.4 B.5 B.6 B.7 F7EIP F8 EIP.0 EIP.1 EIP.2 EIP.3 FBFC EIP.4 EIP.5 EIP.6 EIP.7 FFAlternates:SCON 98 SCON.0 SCON.1 SCON.2 SCON.3 9B9C SCON.4 SCON.5 SCON.6 SCON.7 9FAS8XCXXX ASSEMBLER PAGE AT-32DS83C530/DS87C530 SPECIAL FUNCTION REGISTERSAT.10.3 Bit Addressable Registers: Specific---------- 4 BITS -------------- ---- ---- ----80 8384 87TCON 88 IT0 IE0 IT1 IE1 8B8C TR0 TF0 TR1 TF1 8F90 9394 97SCON0 98 RI_0 TI_0 RB8_0 TB8_0 9B9C REN_0 SM2_0 SM1_0 SMO_0 9FA0 A3A4 A7IE A8 EX0 ET0 EX1 ET1 ABAC ES0 ET2 ES1 EA AFB0 B3B4 B7IP B8 PX0 PT0 PX1 PT1 BBBC PS0 PT2 PS1 BFSCON1 C0 RI_1 TI_1 RB8_1 TB8_1 C3C4 REN_1 SM2_1 SM1_1 SMO_1 C7T2CON C8 CPRL2 CT2 TR2 EXEN2 CBCC TCLK RCLK EXF2 TF2 CFPSW D0 P FL OV RS0 D3D4 RS1 F0 AC CY D7WDCON D8 RWT EWT WTRF WDIF DBDC PFI EPFI POR SMOD_1 DFE0 E3E4 E7EIE E8 EX2 EX3 EX4 EX5 EBEC EWDI ERTCI EFF0 F3F4 F7EIP F8 PX2 PX3 PX4 PX5 FBFC PWDI PRTCI FFAlternates:SCON 98 RI TI RB8 TB8 9B9C REN SM2 SM1 SMO 9FSCON 98 9B9C FE 9FSCON0 98 9B9C FE_0 9FSCON1 C0 C3C4 FE_1 C7T2CON C8 CP_RL2 C_T2 CBCC CFAS8XCXXX ASSEMBLER PAGE AT-33DS83C530/DS87C530 SPECIAL FUNCTION REGISTERSAT.10.4 Optional Symbols: Control Bits---------- 4 BITS -------------- ---- ---- ----0x80 0x40 0x20 0x100x08 0x04 0x02 0x10---- ---- ---- ----DPS 0x80 0x100x08 SEL 0x01PCON 0x80 SMOD_0 SMOD0 0x100x08 GF1 GF0 STOP IDLE 0x01TMOD 0x80 T1GATE T1C_T T1M1 T1M0 0x100x08 T0GATE T0C_T T0M1 T0M0 0x01CKCON 0x80 WD1 WD0 T2M T1M 0x100x08 T0M MD2 MD1 MD0 0x01EXIF 0x80 IE5 IE4 IE3 IE 0x100x08 XT_RG RGMD RGSL BGS 0x01TRIM 0x80 E4K X12_6 TRM2 _TRM2 0x100x08 TRM1 _TRM1 TRM0 _TRM0 0x01SBUF1 0x80 SB7 SB6 SB5 SB4 0x100x08 SB3 SB2 SB1 SB0 0x01ROMSIZE 0x80 0x100x08 RMS2 RMS1 RMS0 0x01PMR 0x80 CD1 CD0 SWB 0x100x08 XTOFF ALEOFF DME1 DME0 0x01STATUS 0x80 PIP HIP LIP XTUP 0x100x08 SPTA1 SPRA1 SPTA0 SPRA0 0x01T2MOD 0x80 0x100x08 T2OE DCEN 0x01RTCC 0x80 SSCE SCE MCE HCE 0x100x08 RTCRE RTCWE RTCIF RTCE 0x01Alternates:PCON 0x80 SMOD 0x100x08 0x01AS8XCXXX ASSEMBLER PAGE AT-34DS83C530/DS87C530 SPECIAL FUNCTION REGISTERSAT.11 DS83C550/DS87C550 SPECIAL FUNCTION REGISTERSThe DS83C550/DS87C550 Special Function Registers are selectedusing the .DS83C550 or DS87C550 assembler directives.AT.11.1 SFR Map--------- 4 Bytes -------------- ---- ---- ----80 PORT0 SP DPL DPH 8384 DPL1 DPH1 DPS PCON 8788 TCON TMOD TL0 TL1 8B8C TH0 TH1 CKCON 8F90 PORT1 RCON 9394 9798 SCON0 SBUF0 9B9C PMR 9FA0 PORT2 SADDR0 SADDR1 A3A4 A7A8 IE CMPL0 CMPL1 CMPL2 ABAC CPTL0 CPTL1 CPTL2 CPTL3 AFB0 PORT3 ADCON1 ADCON2 B3B4 ADMSB ADLSD WINHI WINLO B7B8 IP SADEN0 SADEN1 BBBC T2CON T2MOD BFC0 PORT4 ROMSIZE C3C4 PORT5 STATUS TA C7C8 T2IR CMPH0 CMPH1 CMPH2 CBCC CPTH0 CPTH1 CPTH2 CPTH3 CFD0 PSW PW0FG PW1FG D3D4 PW2FG PW3FG PWMADR D7D8 SCON1 SBUF1 DBDC PWM0 PWM1 PWM2 PWM3 DFE0 ACC PW01CS PW23CS PW01CON E3E4 PW23CON RLOADL RLOADH E7E8 EIE T2SEL CTCON EBEC TL2 TH2 SETR RSTR EFF0 B PORT6 F3F4 F7F8 EIP FBFC WDCON FFAlternates:80 P0 8390 P1 9398 SCON SBUF 9BA0 P2 A3B0 P3 B3C0 P4 C3AS8XCXXX ASSEMBLER PAGE AT-35DS83C550/DS87C550 SPECIAL FUNCTION REGISTERSC4 P5 C7F0 PORT6 F3AS8XCXXX ASSEMBLER PAGE AT-36DS83C550/DS87C550 SPECIAL FUNCTION REGISTERSAT.11.2 Bit Addressable Registers: Generic---------- 4 BITS -------------- ---- ---- ----PORT0 80 P0.7 P0.6 P0.5 P0.4 8384 P0.3 P0.2 P0.1 P0.0 87TCON 88 TCON.0 TCON.1 TCON.2 TCON.3 8B8C TCON.4 TCON.5 TCON.6 TCON.7 8FPORT1 90 P1.0 P1.1 P1.2 P1.3 9394 P1.4 P1.5 P1.6 P1.7 97SCON0 98 SCON0.0 SCON0.1 SCON0.2 SCON0.3 9B9C SCON0.4 SCON0.5 SCON0.6 SCON0.7 9FPORT2 A0 P2.0 P2.1 P2.2 P2.3 A3A4 P2.4 P2.5 P2.6 P2.7 A7IE A8 IE.0 IE.1 IE.2 IE.3 ABAC IE.4 IE.5 EI.6 IE.7 AFPORT3 B0 P3.0 P3.1 P3.2 P3.3 B3B4 P3.4 P3.5 P3.6 P3.7 B7IP B8 IP.0 IP.1 IP.2 IP.3 BBBC IP.4 IP.5 IP.6 IP.7 BFPORT4 C0 P4.0 P4.1 P4.2 P4.3 C3C4 P4.4 P4.5 P4.6 P4.7 C7T2IR C8 T2IR.0 T2IR.1 T2IR.2 T2IR.3 CBCC T2IR.4 T2IR.5 T2IR.6 T2IR.7 CFPSW D0 PSW.0 PSW.1 PSW.2 PSW.3 D3D4 PSW.4 PSW.5 PSW.6 PSW.7 D7SCON1 D8 SCON1.0 SCON1.1 SCON1.2 SCON1.3 DBDC SCON1.4 SCON1.5 SCON1.6 SCON1.7 DFACC E0 ACC.0 ACC.1 ACC.2 ACC.3 E3E4 ACC.4 ACC.5 ACC.6 ACC.7 E7EIE E8 EIE.0 EIE.1 EIE.2 EIE.3 EBEC EIE.4 EIE.5 EIE.6 EIE.7 EFB F0 B.0 B.1 B.2 B.3 F3F4 B.4 B.5 B.6 B.7 F7EIP F8 EIP.0 EIP.1 EIP.2 EIP.3 FBFC EIP.4 EIP.5 EIP.6 EIP.7 FFAlternates:PORT0 80 PORT0.7 PORT0.6 PORT0.5 PORT0.4 8384 PORT0.3 PORT0.2 PORT0.1 PORT0.0 87PORT1 90 PORT1.0 PORT1.1 PORT1.2 PORT1.3 9394 PORT1.4 PORT1.5 PORT1.6 PORT1.7 97SCON 98 SCON.0 SCON.1 SCON.2 SCON.3 9B9C SCON.4 SCON.5 SCON.6 SCON.7 9FPORT2 A0 PORT2.0 PORT2.1 PORT2.2 PORT2.3 A3A4 PORT2.4 PORT2.5 PORT2.6 PORT2.7 A7PORT3 B0 PORT3.0 PORT3.1 PORT3.2 PORT3.3 B3B4 PORT3.4 PORT3.5 PORT3.6 PORT3.7 B7PORT4 C0 PORT4.0 PORT4.1 PORT4.2 PORT4.3 C3C4 PORT4.4 PORT4.5 PORT4.6 PORT4.7 C7AS8XCXXX ASSEMBLER PAGE AT-37DS83C550/DS87C550 SPECIAL FUNCTION REGISTERSAT.11.3 Bit Addressable Registers: Specific---------- 4 BITS -------------- ---- ---- ----80 8384 87TCON 88 IT0 IE0 IT1 IE1 8B8C TR0 TF0 TR1 TF1 8F90 9394 97SCON0 98 RI_0 TI_0 RB8_0 TB8_0 9B9C REN_0 SM2_0 SM1_0 SMO_0 9FA0 A3A4 A7IE A8 EX0 ET0 EX1 ET1 ABAC ES0 ET2 ES1 EA AFB0 B3B4 B7IP B8 PX0 PT0 PX1 PT1 BBBC PS0 PS1 PAD BFPORT4 C0 CMSR0 CMSR1 CMSR2 CMSR3 C3C4 CMSR4 CMSR5 CMT0 CMT1 C7T2IR C8 CF0 CF1 CF2 CF3 CBCC CM0F CM1F CM2F CFPSW D0 P FL OV RS0 D3D4 RS1 F0 AC CY D7SCON1 D8 RI_1 TI_1 RB8_1 TB8_1 DBDC REN_1 SM2_1 SM1_1 SMO_1 DFE0 E3E4 E7EIE E8 EX2 EX3 EX4 EX5 EBEC ECM0 ECM1 ECM2 ET2 EFF0 F3F4 F7EIP F8 PX2 PX3 PX4 PX5 FBFC PCM0 PCM1 PCM2 PT2 FFAlternates:SCON 98 RI TI RB8 TB8 9B9C REN SM2 SM1 SMO 9FSCON 98 9B9C FE 9FSCON0 98 9B9C FE_0 9FT2IR C8 IE2 IE3 IE4 IE5 CBCC CFSCON1 D8 DBDC FE_1 DFEIE E8 EC0 EC1 EC2 EC3 EBEC EFEIP F8 PC0 PC1 PC2 PC3 FBAS8XCXXX ASSEMBLER PAGE AT-38DS83C550/DS87C550 SPECIAL FUNCTION REGISTERSFC FFAS8XCXXX ASSEMBLER PAGE AT-39DS83C550/DS87C550 SPECIAL FUNCTION REGISTERSAT.11.4 Optional Symbols: Control Bits---------- 4 BITS -------------- ---- ---- ----0x80 0x40 0x20 0x100x08 0x04 0x02 0x10---- ---- ---- ----DPS 0x80 ID1 ID0 TSL 0x100x08 SEL 0x01PCON 0x80 SMOD_0 SMOD0 0x100x08 GF1 GF0 STOP IDLE 0x01TMOD 0x80 T1GATE T1C_T T1M1 T1M0 0x100x08 T0GATE T0C_T T0M1 T0M0 0x01CKCON 0x80 WD1 WD0 T2M T1M 0x100x08 T0M MD2 MD1 MD0 0x01RCON 0x80 0x100x08 CKRDY RGMD RGSL BGS 0x01PMR 0x80 CD1 CD0 SWB CTM 0x100x08 4X_2X ALEOFF DEM1 DEM0 0x01ADCON1 0x80 STRT_BSY EOC CONT_SS ADEX 0x100x08 WCQ WCM ADON WCIO 0x01ADCON2 0x80 OUTCF MUX2 MUX1 MUX0 0x100x08 APS3 APS2 APS1 APS0 0x01T2CON 0x80 TF2 EXF2 RCLK TCLK 0x100x08 EXEN2 TR2 CT2 CPRL2 0x01T2MOD 0x80 0x100x08 T2OE DCEN 0x01PORT5 0x80 ADC7 ADC6 ADC5 ADC4 0x100x08 ADC3 ADC2 ADC1 ADC0 0x01ROMSIZE 0x80 0x100x08 RMS2 RMS1 RMS0 0x01STATUS 0x80 PIP HIP LIP XTUP 0x100x08 SPTA1 SPRA1 SPTA0 SPRA0 0x01PWMADR 0x80 ADRS 0x100x08 PWE1 PWE0 0x01PW01CS 0x80 PW0S2 PW0S1 PW0S0 PW0EN 0x100x08 PW1S2 PW1S1 PW1S0 PW1EN 0x01PW23CS 0x80 PW2S2 PW2S1 PW2S0 PW2EN 0x100x08 PW3S2 PW3S1 PW3S0 PW3EN 0x01PW01CON 0x80 PW0F PW0DC PW0OE PW0T_C 0x100x08 PW1F PW1DC PW1OE PW1T_C 0x01PW23CON 0x80 PW2F PW2DC PW2OE PW2T_C 0x100x08 PW3F PW3DC PW3OE PW3T_C 0x01T2SEL 0x80 TF2S TF2BS TF2B 0x100x08 T2P1 T2P0 0x01CTCON 0x80 _CT3 CT3 _CT2 CT2 0x100x08 _CT1 CT1 _CT0 CT0 0x01SETR 0x80 TGFF1 TGFF0 CMS5 CMS4 0x100x08 CMS3 CMS2 CMS1 CMS0 0x01RSTR 0x80 CMTE1 CMTE0 CMR5 CMR4 0x100x08 CMR3 CMR2 CMR1 CMR0 0x01PORT6 0x80 STADC PWMC1 PWMC0 0x10AS8XCXXX ASSEMBLER PAGE AT-40DS83C550/DS87C550 SPECIAL FUNCTION REGISTERS0x08 PWMO3 PWMO2 PWMO1 PWMO0 0x01WDCON 0x80 SMOD_1 POR EPF1 PF1 0x100x08 WDIF WTRF EWT RWT 0x01Alternates:PCON 0x80 SMOD 0x100x08 0x01T2CON 0x80 0x100x08 C_T2 _RL2 0x01APPENDIX AYASGB ASSEMBLERAY.1 ACKNOWLEDGEMENTThanks to Roger Ivie for his contribution of the ASGB crossassembler.Roger Ivieivie at cc dot usu dot eduAY.2 INTRODUCTIONThe Gameboy uses an 8-bit processor which is closely relatedto the 8080. It is usually described as a modified Z80, but maybe more closely understood as an enhanced 8080; it has the 8080register set and many, but not all, enhanced Z80 instructions.However, even this is not accurate, for the Gameboy also lackssome basic 8080 instructions (most annoyingly SHLD and LHLD).ASGB is based on ASZ80 and therefore uses the Z80 mnemonic set.AY.3 GAMEBOY REGISTER SET AND CONDITIONSThe following is a complete list of register designations andcondition mnemonics:byte registers - a,b,c,d,e,h,lregister pairs - af, bc, de, hlword registers - pc, spC - carry bit setNC - carry bit clearNZ - zero bit clearZ - zero bit setASGB ASSEMBLER PAGE AY-2GAMEBOY INSTRUCTION SETAY.4 GAMEBOY INSTRUCTION SETThe following tables list all Gameboy mnemnoics recognized bythe ASGB assembler. The designation [] refers to a required ad-dressing mode argument. The following list specifies the formatfor each addressing mode supported by ASGB:#data immediate databyte or word datan byte valuerg a byte registera,b,c,d,e,h,lrp a register pair or 16-bit registerbc,de,hl(hl) implied addressing orregister indirect addressing(label) direct addressinglabel call/jmp/jr labelThe terms data, dir, and ext may all be expression. The termdir is not allowed to be an external reference.Note that not all addressing modes are valid with every in-struction. Although official information is not, as far as Iknow, publically available for the Gameboy processor, many unof-ficial sources are available on the internet.AY.4.1 .tile DirectiveFormat:.tile /string/ or.tile ^/string/where: string is a string of ascii characters taken from theset ' ', '.', '+', '*', '0', '1', '2', and '3'.The string must be a multiple of eightcharacters long.ASGB ASSEMBLER PAGE AY-3GAMEBOY INSTRUCTION SET/ / represent the delimiting characters. Thesedelimiters may be any paired printingcharacters, as long as the characters are notcontained within the string itself. If thedelimiting characters do not match, the .tiledirective will give the (q) error.The Gameboy displays information on the screen using a pro-grammable character set (referred to as "tiles" among Gameboydevelopers). The ASGB cross assembler has a processor-specificassembler directive to aid in the creation of the game'scharacter set.Each character is created from an 8x8 grid of pixels, eachpixel of which is composed of two bits. The .tile directive ac-cepts a single string argument which is processed to create thebyte values corresponding to the lines of pixels in thecharacter. The string argument must be some multiple of 8characters long, and be one of these characters:' ' or '0' - for the pixel value 00'.' or '1' - for the pixel value 01'+' or '2' - for the pixel value 10'*' or '3' - for the pixel value 11The .tile directive processes each 8-character group of itsstring argument to create the two-byte value corresponding tothat line of pixels. The example in the popular extant litera-ture could be done using ASGB like this:0000 7C 7C 1 .tile " ***** "0002 00 C6 2 .tile "++ ++ "0004 C6 00 3 .tile ".. .. "0006 00 FE 4 .tile "+++++++ "0008 C6 C6 5 .tile "** ** "000A 00 C6 6 .tile "++ ++ "000C C6 00 7 .tile ".. .. "000E 00 00 8 .tile " "Or, using the synonym character set, as:0010 7C 7C 10 .tile "03333300"0012 00 C6 11 .tile "22000220"0014 C6 00 12 .tile "11000110"0016 00 FE 13 .tile "22222220"0018 C6 C6 14 .tile "33000330"001A 00 C6 15 .tile "22000220"001C C6 00 16 .tile "11000110"001E 00 00 17 .tile "00000000"ASGB ASSEMBLER PAGE AY-4GAMEBOY INSTRUCTION SETSince .tile is perfectly willing to assemble multiple linesof a character at once (as long as it is given complete rows ofpixels), it could even be done as:.tile " ***** ++ ++ .. .. +++++++ ".tile "** ** ++ ++ .. .. "AY.4.2 Potentially Controversial Mnemonic SelectionAlthough the Gameboy processor is based on the Z80, it doesinclude some features which are not present in the Z80. The Z80mnemonic set is not sufficient to describe these additionaloperations; mnemonics must be created for the new operations.The mnemonics ASGB uses are not the same as those used by otherpublically-available Gameboy assemblers.AY.4.2.1 Auto-Indexing Loads -The Gameboy provides instructions to load or store the ac-cumulator indirectly via HL and then subsequently increment ordecrement HL. ASGB uses the mnemonic 'ldd' for the instructionswhich decrement HL and 'ldi' for the instructions which incre-ment HL. Because the Gameboy lacks the Z80's block moves, themnemonics are not otherwise needed by ASGB.ldd a,(hl) ldd (hl),aldi a,(hl) ldi (hl),aAY.4.2.2 Input and Output Operations -The Gameboy replaces the Z80's separate address space forI/O with a mechanism similar to the zero page addressing of pro-cessors such as the 6800 or 6502. All I/O registers in theGameboy reside in the address range between 0xff00 and 0xffff.The Gameboy adds special instructions to load and store the ac-cumulator from and into this page of memory. The instructionsare analogous to the Z80's in and out instructions and ASGB re-tains the 'in' and 'out' mnemonics for them.in a,(n) out (n),ain a,(c) out (c),aFrom ASGB's perspective, the RAM available from 0xff80through 0xffff is composed of unused I/O locations rather thandirect-page RAM.ASGB ASSEMBLER PAGE AY-5GAMEBOY INSTRUCTION SETAY.4.2.3 The 'stop' Instruction -The publically-available documentation for the Gameboylists the 'stop' instruction as the two-byte instruction 10 00,and the other freely-available Gameboy assemblers assemble it inthat manner. As far as I can tell, the only rationale for thisis that the corresponding Z80 instruction ('djnz label') is atwo-byte instruction. ASGB assembles 'stop' as the one-byte in-struction 10.AY.4.3 Inherent Instructionsccf cpldaa diei nophalt rlarlca rrarrca scfreti stopswapAY.4.4 Implicit Operand Instructionsadc a,[] adc []add a,[] add []and a,[] and []cp a,[] cp []dec a,[] dec []inc a,[] inc []or a,[] or []rl a,[] rl []rlc a,[] rlc []rr a,[] rr []rrc a,[] rrc []sbc a,[] sbc []sla a,[] sla []sra a,[] sra []srl a,[] srl []sub a,[] sub []xor a,[] xor []ASGB ASSEMBLER PAGE AY-6GAMEBOY INSTRUCTION SETAY.4.5 Load Instructionsld rg,[] ld [],rgld (bc),a ld a,(bc)ld (de),a ld a,(de)ld (label),a ld a,(label)ld (label),sp ld rp,#datald sp,hl ld hl,spldd a,(hl) ldd (hl),aldi a,(hl) ldi (hl),aAY.4.6 Call/Return Instructionscall C,label ret Ccall NC,label ret NCcall Z,label ret Zcall NZ,label ret NZcall label retrst nAY.4.7 Jump Instructionsjp C,label jp NC,labeljp Z,label jp NZ,labeljp (hl) jp labeljr C,label jr NC,labeljr Z,label jr NZ,labeljr labelAY.4.8 Bit Manipulation Instructionsbit n,[]res n,[]set n,[]ASGB ASSEMBLER PAGE AY-7GAMEBOY INSTRUCTION SETAY.4.9 Input and Output Instructionsin a,(n) in a,(c)out (n),a out (c),aAY.4.10 Register Pair Instructionsadd hl,rp add hl,spadd sp,#datapush rp pop rpAPPENDIX BCASRAB ASSEMBLERBC.1 ACKNOWLEDGMENTThanks to Ulrich Raich and Razaq Ijoduola for their contributionof the ASRAB cross assembler.Ulrich Raich and Razaq IjoduolaPS DivisionCERNCH-1211 Geneva-23Ulrich RaichUlrich dot Raich at cern dot chBC.2 PROCESSOR SPECIFIC DIRECTIVESThe ASRAB assembler is a port of the ASZ80 assembler. Thisassembler can process Z80, HD64180 (Z180), and Rabbit 2000/3000(default) code. The following processor specific assemblerdirectives specify which processor to target when processing theinput assembler files.ASRAB ASSEMBLER PAGE BC-2PROCESSOR SPECIFIC DIRECTIVESBC.2.1 .r2k DirectiveFormat:.r2kThe .r2k directive enables processing of the Rabbit 2000/3000specific mnemonics. Mnemonics not associated with the Rabbit2000/3000 processor will be flagged with an 'o' error. Address-ing modes not supported by the Rabbit 2000/3000 will be flaggedwith an 'a' error. A synonym of .r2k is .r3k. The default as-sembler mode is .r2k.The .r2k directive also selects the Rabbit 2000/3000specific cycles count to be output.BC.2.2 .hd64 DirectiveFormat:.hd64The .hd64 directive enables processing of the HD64180 (Z180)specific mnemonics not included in the Z80 instruction set.Rabbit 2000/3000 mnemonics encountered will be flagged with an'o' error. Addressing modes not supported by the HD64180 (Z180)will be flagged with an 'a' error. A synonym of .hd64 is .z180.The .hd64 directive also selects the HD64180/Z180 specificcycles count to be output.BC.2.3 .z80 DirectiveFormat:.z80The .z80 directive enables processing of the Z80 specificmnemonics. HD64180 and Rabbit 2000/3000 specific mnemonics willbe flagged with an 'o' error. Addressing modes not supported bythe z80 will be flagged with an 'a' error.The .z80 directive also selects the Z80 specific cyclescount to be output.ASRAB ASSEMBLER PAGE BC-3PROCESSOR SPECIFIC DIRECTIVESBC.2.4 The .__.CPU. VariableThe value of the pre-defined symbol '.__.CPU.' correspondsto the selected processor type. The default value is 0 whichcorresponds to the default processor type. The following tablelists the processor types and associated values for the ASRABassembler:Processor Type .__.CPU. Value-------------- --------------.r2k / .r3k 0.hd64 / .z180 1.z80 2The variable '.__.CPU.' is by default defined as local andwill not be output to the created .rel file. The assembler com-mand line options -g or -a will not cause the local symbol to beoutput to the created .rel file.The assembler .globl directive may be used to change thevariable type to global causing its definition to be output tothe .rel file. The inclusion of the definition of the variable'.__.CPU.' might be a useful means of validating that seperatelyassembled files have been compiled for the same processor type.The linker will report an error for variables with multiple nonequal definitions.ASRAB ASSEMBLER PAGE BC-4PROCESSOR SPECIFIC DIRECTIVESBC.3 RABBIT 2000/3000 ADDRESSING AND INSTRUCTIONSBC.3.1 Instruction Symbolsb Bit select(000 = bit 0, 001 = bit 1,010 = bit 2, 011 = bit 3,100 = bit 4, 101 = bit 5,110 = bit 6, 111 = bit 7)cc Condition code select(00 = NZ, 01 = Z, 10 = NC, 11 = C)d 8-bit (signed) displacement.Expressed in two\'s complement.dd word register select-destination(00 = BC, 01 = DE, 10 = HL, 11 = SP)dd' word register select-alternate(00 = BC', 01 = DE', 10 = HL')e 8-bit (signed) displacement added to PC.f condition code select(000 = NZ, 001 = Z, 010 = NC, 011 = C,100 = LZ/NV, 101 = LO/V, 110 = P, 111 = M)m the most significant bits(MSB) of a 16-bit constantmn 16-bit constantn 8-bit constant or the least significant bits(LSB)of a 16-bit constantr, g byte register select(000 = B, 001 = C, 010 = D, 011 = E,100 = H, 101 = L, 111 = A)ss word register select-source(00 = BC, 01 = DE, 10 = HL, 11 = SP)v Restart address select(010 = 0020h, 011 = 0030h, 100 = 0040h,101 = 0050h, 111 = 0070h)x an 8-bit constant to load into the XPCxx word register select(00 = BC, 01 = DE, 10 = IX, 11 = SP)yy word register select(00 = BC, 01 = DE, 10 = IY, 11 = SP)zz word register select(00 = BC, 01 = DE, 10 = HL, 11 = AF)ASRAB ASSEMBLER PAGE BC-5RABBIT 2000/3000 ADDRESSING AND INSTRUCTIONSC - carry bit setM - sign bit setNC - carry bit clearNZ - zero bit clearP - sign bit clearPE - parity evenV - overflow bit setPO - parity oddNV - overflow bit clearZ - zero bit setThe terms m, mn, n, and x may all be expressions. The terms band v are not allowed to be external references.ASRAB ASSEMBLER PAGE BC-6RABBIT 2000/3000 ADDRESSING AND INSTRUCTIONSBC.3.2 Rabbit InstructionsThe following list of instructions (with explicit address-ing modes) are available in the Rabbit 2000/3000 assembler mode.Those instructions denoted by an asterisk (*) are additional in-structions not available in the HD64180 or Z80 assembler mode.ADC A,n DEC IX LD A,EIRADC A,r DEC IY LD A,IIRADC A,(HL) DEC r *LD A,XPCADC A,(IX+d) DEC ss LD A,(BC)ADC A,(IY+d) DEC (HL) LD A,(DE)ADC HL,ss DEC (IX+d) LD A,(mn)ADD A,n DEC (IY+d) *LD dd,BCADD A,r DJNZ e *LD dd,DEADD A,(HL) LD dd,mnADD A,(IX+d) EX AF,AF LD dd,(mn)ADD A,(IY+d) EX DE,HL LD EIR,AADD HL,ss EX DE,HL *LD HL,IXADD IX,xx EX (SP),HL *LD HL,IYADD IY,yy EX (SP),IX *LD HL,(HL+d)*ADD SP,d EX (SP),IY *LD HL,(IX+d)*ALTD EXX *LD HL,(IY+d)*AND HL,DE LD HL,(mn)*AND IX,DE INC IX *LD HL,(SP+n)*AND IY,DE INC IY LD IIR,AAND n INC r *LD IX,HLAND r INC ss LD IX,mnAND (HL) INC (HL) LD IX,(mn)AND (IX+d) INC (IX+d) *LD IX,(SP+n)AND (IY+d) INC (IY+d) *LD IY,HL*IOE LD IY,mnBIT b,r *IOI LD IY,(mn)BIT b,(HL) *IPRES *LD IY,(SP+n)BIT b,(IX+d) *IPSET 0 LD r,gBIT b,(IY+d) *IPSET 1 LD r,n*BOOL HL *IPSET 2 LD r,(HL)*BOOL IX *IPSET 3 LD r,(IX+d)*BOOL IY LD r,(IY+d)JP f,mn LD SP,HLCALL mn JP mn LD SP,IXCCF JP (HL) LD SP,IYCP n JP (IX) *LD XPC,ACP r JP (IY) LD (BC),ACP (HL) JR cc,e LD (DE),ACP (IX+d) JR e LD (HL),nCP (IY+d) LD (HL),rCPL *LCALL x,mnASRAB ASSEMBLER PAGE BC-7RABBIT 2000/3000 ADDRESSING AND INSTRUCTIONS*LD (HL+d),HL *POP IP SBC A,n*LD (IX+d),HL POP IX SBC A,rLD (IX+d),n POP IY SBC A,(HL)LD (IX+d),r POP zz SBC HL,ss*LD (IY+d),HL *PUSH IP SBC (IX+d)LD (IY+d),n PUSH IX SBC (IY+d)LD (IY+d),r PUSH IY SCFLD (mn),A PUSH zz SET b,rLD (mn),HL SET b,(HL)LD (mn),IX RA SET b,(IX+d)LD (mn),IY RES b,r SET b,(IY+d)LD (mn),ss RES b,(HL) SLA r*LD (SP+n),HL RES b,(IX+d) SLA (HL)*LD (SP+n),IX RES b,(IY+d) SLA (IX+d)*LD (SP+n),IY RET SLA (IY+d)LDD RET f SRA rLDDR *RETI SRA (HL)LDI *RL DE SRA (IX+d)LDIR RL r SRA (IY+d)*LDP HL,(HL) RL (HL) SRL r*LDP HL,(IX) RL (IX+d) SRL (HL)*LDP HL,(IY) RL (IY+d) SRL (IX+d)*LDP HL,(mn) RLA SRL (IY+d)*LDP IX,(mn) RLC r SUB n*LDP IY,(mn) RLC (HL) SUB r*LDP (HL),HL RLC (IX+d) SUB (HL)*LDP (IX),HL RLC (IY+d) SUB (IX+d)*LDP (IY),HL RLCA SUB (IY+d)*LDP (mn),HL *RR DE*LDP (mn),IX *RR HL XOR n*LDP (mn),IY *RR IX XOR rLJP x,mn *RR IY XOR (HL)LRET RR r XOR (IX+d)RR (HL) XOR (IY+d)*MUL RR (IX+d)RR (IY+d)NEG RRC rNOP RRC (HL)RRC (IX+d)*OR HL,DE RRC (IY+d)*OR IX,DE RRCA*OR IY,DE RST vOR nOR rOR (HL)OR (IX+d)OR (IY+d)ASRAB ASSEMBLER PAGE BC-8Z80/HD64180 ADDRESSING AND INSTRUCTIONSBC.4 Z80/HD64180 ADDRESSING AND INSTRUCTIONSThe following list specifies the format for each Z80/HD64180 ad-dressing mode supported by ASZ80:#data immediate databyte or word datan byte valuerg a byte registera,b,c,d,e,h,lrp a register pairbc,de,hl(hl) implied addressing orregister indirect addressing(label) direct addressing(ix+offset) indexed addressing withoffset(ix) an offsetlabel call/jmp/jr labelThe terms data, n, label, and offset, may all be expressions.The terms dir and offset are not allowed to be external refer-ences.The following tables list all Z80/HD64180 mnemonics recog-nized by the ASRAB assembler. The designation [] refers to arequired addressing mode argument. Note that not all addressingmodes are valid with every instruction, refer to the Z80/HD64180technical data for valid modes.ASRAB ASSEMBLER PAGE BC-9Z80/HD64180 ADDRESSING AND INSTRUCTIONSBC.4.1 Inherent Instructionsccf cpdcpdr cpicpir cpldaa diei exxhalt negnop retiretn rlarlca rldrra rrcarrd scfBC.4.2 Implicit Operand Instructionsadc a,[] adc []add a,[] add []and a,[] and []cp a,[] cp []dec a,[] dec []inc a,[] inc []or a,[] or []rl a,[] rl []rlc a,[] rlc []rr a,[] rr []rrc a,[] rrc []sbc a,[] sbc []sla a,[] sla []sra a,[] sra []srl a,[] srl []sub a,[] sub []xor a,[] xor []ASRAB ASSEMBLER PAGE BC-10Z80/HD64180 ADDRESSING AND INSTRUCTIONSBC.4.3 Load Instructionld rg,[] ld [],rgld (bc),a ld a,(bc)ld (de),a ld a,(de)ld (label),a ld a,(label)ld (label),rp ld rp,(label)ld i,a ld r,ald a,i ld a,rld sp,hl ld sp,ixld sp,iy ld rp,#dataldd lddrldi ldirBC.4.4 Call/Return Instructionscall C,label ret Ccall M,label ret Mcall NC,label ret NCcall NZ,label ret NZcall P,label ret Pcall PE,label ret PEcall PO,label ret POcall Z,label ret Zcall label retBC.4.5 Jump and Jump to Subroutine Instructionsjp C,label jp M,labeljp NC,label jp NZ,labeljp P,label jp PE,labeljp PO,label jp Z,labeljp (hl) jp (ix)jp (iy) jp labeldjnz labeljr C,label jr NC,labeljr NZ,label jr Z,labeljr labelASRAB ASSEMBLER PAGE BC-11Z80/HD64180 ADDRESSING AND INSTRUCTIONSBC.4.6 Bit Manipulation Instructionsbit n,[]res n,[]set n,[]BC.4.7 Interrupt Mode and Reset Instructionsim nim nim nrst nBC.4.8 Input and Output Instructionsin a,(n) in rg,(c)ind indrini inirout (n),a out (c),rgoutd otdrouti otirBC.4.9 Register Pair Instructionsadd hl,rp add ix,rpadd iy,rpadc hl,rp sbc hl,rpex (sp),hl ex (sp),ixex (sp),iyex de,hlex af,af'push rp pop rpASRAB ASSEMBLER PAGE BC-12Z80/HD64180 ADDRESSING AND INSTRUCTIONSBC.4.10 HD64180 Specific Instructionsin0 rg,(n)out0 (n),rgotdm otdmrotim otimrmlt bc mlt demlt hl mlt spslptst atstio #dataAPPENDIX BIASZ80 ASSEMBLERBI.1 .z80 DIRECTIVEFormat:.z80The .z80 directive enables processing of only the z80 specificmnemonics. HD64180/Z180 mnemonics encountered without the .hd64directive will be flagged with an 'o' error.The .z80 directive also selects the Z80 specific cyclescount to be output.BI.2 .hd64 DIRECTIVEFormat:.hd64The .hd64 directive enables processing of the HD64180/Z180specific mnemonics not included in the Z80 instruction set.HD64180/Z180 mnemonics encountered without the .hd64 directivewill be flagged with an 'o' error. A synonym of .hd64 is .z180.The .hd64 directive also selects the HD64180/Z180 specificcycles count to be output.ASZ80 ASSEMBLER PAGE BI-2THE .__.CPU. VARIABLEBI.3 THE .__.CPU. VARIABLEThe value of the pre-defined symbol '.__.CPU.' correspondsto the selected processor type. The default value is 0 whichcorresponds to the default processor type. The following tablelists the processor types and associated values for the ASZ80assembler:Processor Type .__.CPU. Value-------------- --------------.z80 0.hd64 / .z180 1The variable '.__.CPU.' is by default defined as local andwill not be output to the created .rel file. The assembler com-mand line options -g or -a will not cause the local symbol to beoutput to the created .rel file.The assembler .globl directive may be used to change thethe variable type to global causing its definition to be outputto the .rel file. The inclusion of the definition of the vari-able '.__.CPU.' might be a useful means of validating thatseperately assembled files have been compiled for the same pro-cessor type. The linker will report an error for variables withmultiple non equal definitions.BI.4 Z80 REGISTER SET AND CONDITIONSThe following is a complete list of register designationsand condition mnemonics:byte registers - a,b,c,d,e,h,l,i,rregister pairs - af,af',bc,de,hlword registers - pc,sp,ix,iyC - carry bit setM - sign bit setNC - carry bit clearNZ - zero bit clearP - sign bit clearPE - parity evenPO - parity oddZ - zero bit setASZ80 ASSEMBLER PAGE BI-3Z80 INSTRUCTION SETBI.5 Z80 INSTRUCTION SETThe following list specifies the format for each addressingmode supported by ASZ80:#data immediate databyte or word datan byte valuerg a byte registera,b,c,d,e,h,lrp a register pairbc,de,hl(hl) implied addressing orregister indirect addressing(label) direct addressingoffset(ix) indexed addressing withan offsetlabel call/jmp/jr labelThe terms data, n, label, and offset may all be expressions.Note that not all addressing modes are valid with every in-struction, refer to the Z80/HD64180/Z180 technical data forvalid modes.The following tables list all Z80/HD64180/Z180 mnemonicsrecognized by the ASZ80 assembler. The designation [] refers toa required addressing mode argument.ASZ80 ASSEMBLER PAGE BI-4Z80 INSTRUCTION SETBI.5.1 Inherent Instructionsccf cpdcpdr cpicpir cpldaa diei exxhalt negnop retiretn rlarlca rldrra rrcarrd scfBI.5.2 Implicit Operand Instructionsadc a,[] adc []add a,[] add []and a,[] and []cp a,[] cp []dec a,[] dec []inc a,[] inc []or a,[] or []rl a,[] rl []rlc a,[] rlc []rr a,[] rr []rrc a,[] rrc []sbc a,[] sbc []sla a,[] sla []sra a,[] sra []srl a,[] srl []sub a,[] sub []xor a,[] xor []ASZ80 ASSEMBLER PAGE BI-5Z80 INSTRUCTION SETBI.5.3 Load Instructionld rg,[] ld [],rgld (bc),a ld a,(bc)ld (de),a ld a,(de)ld (label),a ld a,(label)ld (label),rp ld rp,(label)ld i,a ld r,ald a,i ld a,rld sp,hl ld sp,ixld sp,iy ld rp,#dataldd lddrldi ldirBI.5.4 Call/Return Instructionscall C,label ret Ccall M,label ret Mcall NC,label ret NCcall NZ,label ret NZcall P,label ret Pcall PE,label ret PEcall PO,label ret POcall Z,label ret Zcall label retBI.5.5 Jump and Jump to Subroutine Instructionsjp C,label jp M,labeljp NC,label jp NZ,labeljp P,label jp PE,labeljp PO,label jp Z,labeljp (hl) jp (ix)jp (iy) jp labeldjnz labeljr C,label jr NC,labeljr NZ,label jr Z,labeljr labelASZ80 ASSEMBLER PAGE BI-6Z80 INSTRUCTION SETBI.5.6 Bit Manipulation Instructionsbit n,[]res n,[]set n,[]BI.5.7 Interrupt Mode and Reset Instructionsim nim nim nrst nBI.5.8 Input and Output Instructionsin a,(n) in rg,(c)ind indrini inirout (n),a out (c),rgoutd otdrouti otirBI.5.9 Register Pair Instructionsadd hl,rp add ix,rpadd iy,rpadc hl,rp sbc hl,rpex (sp),hl ex (sp),ixex (sp),iyex de,hlex af,af'push rp pop rpASZ80 ASSEMBLER PAGE BI-7Z80 INSTRUCTION SETBI.5.10 HD64180/Z180 Specific Instructionsin0 rg,(n)out0 (n),rgotdm otdmrotim otimrmlt bc mlt demlt hl mlt spslptst atstio #data