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  1.     module Memory
  2. BANKM = #5b5c
  3. MEM_PORT = #7ffd
  4.  
  5. init:
  6.     di
  7.     res 4, (iy + 1)
  8.    
  9.     xor a : call setPage
  10.     ret
  11.  
  12. ; a - page
  13. setPage:
  14.     or #18 : ld (BANKM), a
  15.     ld bc, MEM_PORT : out (c), a
  16.     ret
  17.  
  18.     endmodule