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;/*****************************************************************************
; * @file: startup_core_cm0.mca
; * @author Phyton Application Team
; * @version: V1.1
; * @date: 01/09/2011
; * @brief: Generic Cortex Device CMSIS Startup File for the devices:
; * Cortex-M0, Cortex-M1
; *****************************************************************************
; * <br><br>
; *
; * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
; * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
; * TIME. AS A RESULT, PHYTON SHALL NOT BE HELD LIABLE FOR ANY DIRECT, INDIRECT
; * OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
; * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
; * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
; *
; * <h2><center>© COPYRIGHT 2010 Phyton</center></h2>
; *****************************************************************************
; * FILE startup_core_cm0.mca
; */
.PMODULE ?startup_device
.IF .NOT .DEFINED __VECTORS_ADDR
__VECTORS_ADDR .EQU 00000000H
.ENDIF
.PUBLIC __Vectors
.PUBLIC __Vectors_End
.EXTRN(code) ?start
.RSEG CSTACK,data
.ALIGN 3
.ASEG INTVEC,code
.ALIGN 6
.ORG __VECTORS_ADDR ; if vector table is located in RAM,
; change this value
SET_HANDLER .MACRO Name
.EXTRNF16 Name .VOID(.VOID)
.DCD Name
.ENDMAC
__Vectors .LABELD
.DCD (.SFE CSTACK) + 1 ; Top of Stack
SET_HANDLER Reset_Handler ; Reset Handler
SET_HANDLER NMI_Handler ; NMI Handler
SET_HANDLER HardFault_Handler ; Hard Fault Handler
.DCD 0 ; Reserved
.DCD 0 ; Reserved
.DCD 0 ; Reserved
.DCD 0 ; Reserved
.DCD 0 ; Reserved
.DCD 0 ; Reserved
.DCD 0 ; Reserved
SET_HANDLER SVC_Handler ; SVCall Handler
.DCD 0 ; Reserved
.DCD 0 ; Reserved
SET_HANDLER PendSV_Handler ; PendSV Handler
SET_HANDLER SysTick_Handler ; SysTick Handler
.DCD 0; MIL_STD_1553B2_Handler ;IRQ0
.DCD 0; MIL_STD_1553B1_Handler ;IRQ1
.DCD 0; USB_Handler ;IRQ2
.DCD 0; CAN1_Handler ;IRQ3
.DCD 0; CAN2_Handler ;IRQ4
.DCD 0; DMA_Handler ;IRQ5
.DCD 0; UART1_Handler ;IRQ6
.DCD 0; UART2_Handler ;IRQ7
.DCD 0; SSP1_Handler ;IRQ8
.DCD 0; BUSY_Handler ;IRQ9
.DCD 0; ARINC429R_Handler ;IRQ10
.DCD 0; POWER_Handler ;IRQ11
.DCD 0; WWDG_Handler ;IRQ12
.DCD 0; TIMER4_Handler ;IRQ13
.DCD 0; TIMER1_Handler ;IRQ14
.DCD 0; TIMER2_Handler ;IRQ15
.DCD 0; TIMER3_Handler ;IRQ16
.DCD 0; ADC_Handler ;IRQ17
SET_HANDLER ETHERNET_Handler ;IRQ18
.DCD 0; SSP3_Handler ;IRQ19
.DCD 0; SSP2_Handler ;IRQ20
.DCD 0; ARINC429T1_Handler ;IRQ21
.DCD 0; ARINC429T2_Handler ;IRQ22
.DCD 0; ARINC429T3_Handler ;IRQ23
.DCD 0; ARINC429T4_Handler ;IRQ24
.DCD 0 ;IRQ25
.DCD 0 ;IRQ26
.DCD 0; BKP_Handler ;IRQ27
.DCD 0; EXT_INT1_Handler ;IRQ28
.DCD 0; EXT_INT2_Handler ;IRQ29
.DCD 0; EXT_INT3_Handler ;IRQ30
.DCD 0; EXT_INT4_Handler ;IRQ31
;
; SET_HANDLER IRQ0_IRQHandler ; External Interrupt(0) Handler
; ....
; SET_HANDLER IRQn_IRQHandler ; External Interrupt(n) Handler
__Vectors_End .LABELD
.ENDMOD
;=====================================================================;
; ;
; Default Reset handler ;
; ;
;=====================================================================;
.LMODULE2 ?Reset_Handler
.PUBLIC Reset_Handler
.EXTRN(code) ?start
.EXTRNF16 SystemInit .VOID(.VOID)
.RSEG CSTACK,data
.RSEG ??DEFAULT_HANDLERS,code
.THUMB
Reset_Handler?T:
Reset_Handler .EQU Reset_Handler?T+1
.FUNCTYPE .VOID Reset_Handler(.VOID)
LDR R0, =(.SFE CSTACK) + 1
MSR MSP, R0
LDR R0, =SystemInit
BLX R0
LDR R0, =?start
BX R0
.ENDMOD
;=====================================================================;
; ;
; Default interrupt handlers ;
; ;
;=====================================================================;
.LMODULE2 ?NMI_Handler
.PUBLIC NMI_Handler
.RSEG ??DEFAULT_HANDLERS,code
.THUMB
NMI_Handler?T:
NMI_Handler .EQU NMI_Handler?T+1
.FUNCTYPE .VOID NMI_Handler(.VOID)
B $
.ENDMOD
.LMODULE2 ?HardFault_Handler
.PUBLIC HardFault_Handler
.RSEG ??DEFAULT_HANDLERS,code
.THUMB
HardFault_Handler?T:
HardFault_Handler .EQU HardFault_Handler?T+1
.FUNCTYPE .VOID HardFault_Handler(.VOID)
B $
.ENDMOD
.LMODULE2 ?SVC_Handler
.PUBLIC SVC_Handler
.RSEG ??DEFAULT_HANDLERS,code
.THUMB
SVC_Handler?T:
SVC_Handler .EQU SVC_Handler?T+1
.FUNCTYPE .VOID SVC_Handler(.VOID)
B $
.ENDMOD
.LMODULE2 ?PendSV_Handler
.PUBLIC PendSV_Handler
.RSEG ??DEFAULT_HANDLERS,code
.THUMB
PendSV_Handler?T:
PendSV_Handler .EQU PendSV_Handler?T+1
.FUNCTYPE .VOID PendSV_Handler(.VOID)
B $
.ENDMOD
.LMODULE2 ?SysTick_Handler
.PUBLIC SysTick_Handler
.RSEG ??DEFAULT_HANDLERS,code
.THUMB
SysTick_Handler?T:
SysTick_Handler .EQU SysTick_Handler?T+1
.FUNCTYPE .VOID SysTick_Handler(.VOID)
B $
.ENDMOD
;=====================================================================;
; ;
; User-defined Interrupt handlers ;
; ;
;=====================================================================;
;.LMODULE2 ?IRQ0_IRQHandler
;.PUBLIC IRQ0_IRQHandler
;.RSEG ??DEFAULT_HANDLERS,code
; .THUMB
;IRQ0_IRQHandler?T:
;IRQ0_IRQHandler .EQU IRQ0_IRQHandler?T+1
;.FUNCTYPE .VOID IRQ0_IRQHandler(.VOID)
; B $
;.ENDMOD
;.LMODULE2 ?IRQn_IRQHandler
;.PUBLIC IRQn_IRQHandler
;.RSEG ??DEFAULT_HANDLERS,code
; .THUMB
;IRQn_IRQHandler?T:
;IRQn_IRQHandler .EQU IRQn_IRQHandler?T+1
;.FUNCTYPE .VOID IRQn_IRQHandler(.VOID)
; B $
;.ENDMOD
;=====================================================================;
; ;
; User-defined low-level initialization that is made ;
; before cstartup ;
; ;
;=====================================================================;
.LMODULE2 ??SystemInit
.PUBLIC SystemInit
.RSEG ??CODE_CLIB,code
.THUMB
SystemInit?T:
SystemInit .EQU SystemInit?T+1
.FUNCTYPE .VOID SystemInit(.VOID)
BX LR
.END
;/******************* (C) COPYRIGHT 2010 Phyton *******************************
;*
;* END OF FILE startup_core_cm0.mca */