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  1.     DEVICE AMSTRADCPC6128
  2.     ORG     0x1200
  3.  
  4. CPC_PAGE_1 MACRO page
  5.     ld b,$74
  6.     ld a,page
  7.     or %11000000
  8.     ld c,a
  9.     out (c),c
  10. ENDM
  11.  
  12. CPC_SET_PEN0_AND_BORDER MACRO
  13.     ld b,$7F
  14.  
  15.     ld c,$00    ; penr=0
  16.     out (c),c
  17.  
  18.     ld c,a
  19.     out (c),c
  20.  
  21.     ld c,$10    
  22.     out (c),c
  23.  
  24.     ld c,a
  25.     out (c),c
  26. ENDM
  27.  
  28. start:
  29.     di
  30.     im 1
  31.  
  32.     ld b,$7F
  33.         ld c,%100'011'01 ; disable ROMS
  34.         out (c),c
  35.  
  36.     ; sync to frame
  37.     call cpc_sync_frame
  38.  
  39.     ; Install interrupt handler
  40.     ld a,$C3    ;; Z80 JP instruction
  41.     ld hl,int1  ;; first function to call
  42.     ld ($0038),a        ;; write JP instruction
  43.     ld ($0039),hl       ;; write address
  44.  
  45.     ei
  46.  
  47.     ld b,$7F
  48.     ld c,$00    ; penr=0
  49.     out (c),c
  50.  
  51. .loop:
  52.     nop
  53.  
  54.     jr .loop
  55.  
  56. ; interrupt setup based on example: http://cpctech.cpc-live.com/source/hwint.asm
  57. cpc_sync_frame:
  58.     di
  59.     im 1
  60.     ;; wait vsync (loop passes if VSYNC signal is high = in vsync)
  61.     ld b,$F5
  62. .wait1:
  63.     in a,(c)
  64.     rra
  65.     jr nc,.wait1
  66. ;; wait for end of vsync (loop passes when VSYNC signal is low = out of vsync)
  67. .wait2:
  68.     in a,(c)
  69.     rra
  70.     jr c,.wait2
  71. ;; now wait again for start (because we know we found the end, if we wait for VSYNC to be active
  72. ;; we know it will be the start)
  73. .wait3:
  74.     in a,(c)
  75.     rra
  76.     jr nc,.wait3
  77.     ret
  78.  
  79. ;; this is synchronised to happen 2 HSYNCs after VSYNC
  80. int1:
  81.     di
  82.     push hl
  83.     ld hl,int2                          ;; we handle int2 next
  84.     ld ($0039),hl                       ;; set new interrupt vector address
  85.     pop hl
  86.     ei
  87.     reti
  88.  
  89. ;;--------------------------------------------------------------------------------------------
  90.  
  91.  
  92. int2:
  93.     di
  94.     push hl
  95.     ld hl,int3                          ;; we handle int3 next
  96.     ld ($0039),hl                       ;; set new interrupt vector address
  97.  
  98.     push bc
  99.     push af
  100.     CPC_PAGE_1 4
  101.     ld a,($4000)
  102.     CPC_SET_PEN0_AND_BORDER
  103.     pop af
  104.     pop bc
  105.  
  106.     pop hl
  107.     ei
  108.     reti
  109.  
  110. ;;--------------------------------------------------------------------------------------------
  111.  
  112.  
  113. int3:
  114.     di
  115.     push hl
  116.     ld hl,int4                          ;; we handle int4 next
  117.     ld ($0039),hl                       ;; set new interrupt vector address
  118.  
  119.     push bc
  120.     push af
  121.     CPC_PAGE_1 5
  122.     ld a,($4000)
  123.     CPC_SET_PEN0_AND_BORDER
  124.     pop af
  125.     pop bc
  126.  
  127.     pop hl
  128.     ei
  129.     reti
  130.  
  131. ;;--------------------------------------------------------------------------------------------
  132.  
  133.  
  134. int4:
  135.     di
  136.     push hl
  137.     ld hl,int5                          ;; we handle int5 next
  138.     ld ($0039),hl                       ;; set new interrupt vector address
  139.  
  140.     push bc
  141.     push af
  142.     CPC_PAGE_1 6
  143.     ld a,($4000)
  144.     CPC_SET_PEN0_AND_BORDER
  145.     pop af
  146.     pop bc
  147.  
  148.     pop hl
  149.     ei
  150.     reti
  151.  
  152. ;;--------------------------------------------------------------------------------------------
  153.  
  154. int5:
  155.     di
  156.     push hl
  157.     ld hl,int6                          ;; we handle int6 next
  158.     ld ($0039),hl                       ;; set new interrupt vector address
  159.  
  160.     push bc
  161.     push af
  162.     CPC_PAGE_1 7
  163.     ld a,($4000)
  164.     CPC_SET_PEN0_AND_BORDER
  165.     pop af
  166.     pop bc
  167.  
  168.     pop hl
  169.     ei
  170.     reti
  171.  
  172. ;;--------------------------------------------------------------------------------------------
  173.  
  174. int6:
  175.     di
  176.     push hl
  177.     ld hl,int1                          ;; we loop back to int1 next
  178.     ld ($0039),hl                       ;; set new interrupt vector address
  179.  
  180.     push bc
  181.     push af
  182.     ld b,$74
  183.     ld c,%11000000
  184.     out (c),c
  185.  
  186.     ld a,$54
  187.     CPC_SET_PEN0_AND_BORDER
  188.     pop af
  189.     pop bc
  190.  
  191.     pop hl
  192.     ei
  193.     reti
  194.  
  195. ; test-screen graphics definition to expand in macro later
  196. test_scr:
  197.     .dg ----####-####---####----
  198.     .dg ---#-----#---#-#--------
  199.     .dg ---#-----#---#-#--------
  200.     .dg ---#-----####--#--------
  201.     .dg ---#-----#-----#--------
  202.     .dg ---#-----#-----#--------
  203.     .dg ----####-#------####----
  204.  
  205.     SLOT 1 : PAGE 4
  206.     ORG $4000
  207.     .ds $40, $4D
  208.  
  209.     SLOT 1 : PAGE 5
  210.     ORG $4000
  211.     .ds $40, $53
  212.  
  213.     SLOT 1 : PAGE 6
  214.     ORG $4000
  215.     .ds $40, $5A
  216.  
  217.     SLOT 1 : PAGE 7
  218.     ORG $4000
  219.     .ds $40, $4C
  220.  
  221. ; define temporary label in all passes to avoid error in pass3 when it is first time used in IF block
  222. dither_fill = 0
  223.  
  224. ; "draw" into VRAM 8x8 dithered block
  225. DITHER_BLOCK_8x8 MACRO adr?, fill?
  226.         ORG adr?-$800+2         ; one line above to make filler-loop simpler
  227. dither_fill = low(((fill?) << 1) | ((fill?) >> 7)) ; swap odd/even pixels by rotating each nibble
  228.         IF ((dither_fill>>4)^dither_fill)&1
  229. dither_fill = dither_fill ^ $11
  230.         ENDIF
  231.         DUP 4                   ; fill four times two rows of pixels
  232.             ORG $+$800-2 : .ds 2, fill?
  233.             ORG $+$800-2 : .ds 2, dither_fill
  234.         EDUP
  235.     ENDM
  236.  
  237. ; "draws" into VRAM 24x7 logo defined by test_scr, drawing it with 8x8 dithered blocks of pixels
  238.     DEFARRAY colors $05, $0F, $5F, $FF, $FA, $F0, $50
  239. gfx_def = test_scr
  240. color_i = 0
  241. first_tile_adr = $C010 + 7*$50
  242.     DUP 7   ; 7 rows
  243. tile_adr = first_tile_adr
  244.         DUP 3   ; 3 bytes of bitmap data
  245. gfx = {b gfx_def}
  246. gfx_def = gfx_def + 1
  247.             DUP 8   ; 8 bits of bitmap data, draw block per bit
  248.                 IF $80 & gfx : DITHER_BLOCK_8x8 tile_adr, colors[color_i] : ENDIF
  249. gfx = gfx << 1
  250. tile_adr = tile_adr + 2
  251.             EDUP
  252.         EDUP
  253. first_tile_adr = first_tile_adr + $50
  254. color_i = color_i + 1
  255.     EDUP
  256.  
  257. ; save the full snapshot in .CDT format (w/loader)
  258.         SAVECDT FULL "savecdt6128.cdt", start, 1, 0, 0, 26, 6, 24
  259.