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  1. ; DOCS design (happened here, while working on it):
  2. ;
  3. ;     MMU <first slot number> [<last slot number>|<single slot option>], <page number>
  4. ;
  5. ; Maps memory page(s) to slot(s), similar to SLOT + PAGE combination, but allows to set up
  6. ; whole range of consecutive slots (with consecutive memory pages). Or when only single
  7. ; slot is specified, extra option can be used to extend particular slot functionality.
  8. ; The slot behaviour will stay set in the current DEVICE until reset by another MMU
  9. ; specifying same slot (even as part of range, that will clear the option to "default").
  10. ;
  11. ; Single slot option (default state is: no error/warning and no wrap = nothing special):
  12. ;     e = error on writing beyond last byte of slot
  13. ;     w = warning on writing beyond last byte of slot
  14. ;     n = wrap address back to start of slot, map next page
  15. ;
  16.  
  17.     DEVICE NONE         ; set "none" explicitly, to avoid "global device" feature
  18.     MMU                 ;; warning about non-device mode
  19.     DEVICE ZXSPECTRUM128
  20.  
  21.     ;; error messages (parsing test)
  22.     MMU !
  23.     MMU 1
  24.     MMU 1 !
  25.     MMU 1 x ; white space (or comma) after char to detect it as unknown option
  26.     MMU 1 x,
  27.     MMU 1 1
  28.     MMU 0,
  29.     MMU 0 1,
  30.     MMU 0 e,
  31.     MMU 0 e,!
  32.  
  33.     ;; correct syntax, invalid arguments
  34.     MMU 0,8
  35.     MMU 4,0
  36.     MMU 3 4,0
  37.     MMU 0 0,8
  38.     MMU 1 0,0
  39.     MMU 0 2,6   ; map pages 6, 7, 8 -> 8 is wrong
  40.  
  41.     ;; test functionality
  42.     ; set init markers in pages 0, 5, 6 and 7
  43.     DB  "77" : ORG 0xC000 : DB "00" : ORG 0xC000, 5 : DB "55" : ORG 0xC000, 6 : DB "66"
  44.     PAGE 7 : ASSERT {0xC000} == "77" : PAGE 6 : ASSERT {0xC000} == "66"
  45.     PAGE 5 : ASSERT {0xC000} == "55" : PAGE 0 : ASSERT {0xC000} == "00"
  46.  
  47.     ; test simple page-in
  48.     MMU 0, 5    : ASSERT {0} == "55"
  49.     MMU 1 3, 5  : ASSERT {0x4000} == "55" : ASSERT {0x8000} == "66" : ASSERT {0xC000} == "77"
  50.  
  51.     ;; test slot options (these are confined to single slot only, not to range)
  52.     ; error option (guarding machine code write outside of current slot)
  53.     MMU 1 e, 5  : ASSERT {0x4000} == "55"
  54.     ORG 0x7FFF  : ld (hl),'s'   ; should be error, 2B opcode leaving slot memory
  55.     ASSERT {0x8000} == "6s"     ; but damage is done in the virtual memory, that's how it is
  56.     ; while escaping from slot through ORG should be legal
  57.     ORG 0x7FFF  : nop : ORG 0x8000 : DB "66"
  58.     ; changing page within tainted slot will keep the guarding ON
  59.     SLOT 1 : PAGE 6 : ASSERT {0x4000} == "66"           ; map page 6 also into slot 1
  60.     ORG 0x7FFF  : ld (hl),'s' : ASSERT {0x8000} == "6s" ; error + damage check
  61.  
  62.     ; verify clearing option by another MMU
  63.     MMU 1, 5    : ASSERT {0x4000} == "55"
  64.     ORG 0x7FFF  : ld (hl),'6' : ASSERT {0x8000} == "66" ; no error
  65.  
  66.     ; warning option (guarding machine code write outside of current slot)
  67.     MMU 1 w, 5  : ASSERT {0x4000} == "55"
  68.     ORG 0x7FFF  : ld (hl),'s'   ; should be warning, 2B opcode leaving slot memory
  69.     ASSERT {0x8000} == "6s"     ; but damage is done in the virtual memory, that's how it is
  70.     ; while escaping from slot through ORG should be legal
  71.     ORG 0x7FFF  : nop : ORG 0x8000 : DB "66"
  72.     ; changing page within tainted slot will keep the guarding ON
  73.     SLOT 1 : PAGE 6 : ASSERT {0x4000} == "66"           ; map page 6 also into slot 1
  74.     ORG 0x7FFF  : ld (hl),'s' : ASSERT {0x8000} == "6s" ; warning + damage check
  75.  
  76.     ; verify clearing option by another MMU when the slot is part of range
  77.     MMU 0 2, 5  : ASSERT {0x4000} == "6s"
  78.     ORG 0x7FFF  : ld (hl),'7' : ASSERT {0x8000} == "77" ; no warning
  79.  
  80.     ; next option making the memory wrap, automatically mapping in next page
  81.     MMU 1 n, 2
  82.     ORG 0x4000 : BLOCK 3*16384, 'n' ; fill pages 2, 3 and 4 with 'n'
  83.     ASSERT {0x4000} == "55" && {0x8000} == "77" ; page 5 is mapped in after that block
  84.     SLOT 1                      ; verify the block write
  85.     PAGE 2 : ASSERT {0x4000} == "nn"
  86.     PAGE 3 : ASSERT {0x4000} == "nn"
  87.     PAGE 4 : ASSERT {0x4000} == "nn"
  88.  
  89.     ; do the wrap-around test with instructions, watch labels land into different pages
  90.     MMU 1 n, 4
  91.     ORG 0x7FFE
  92. label0_p4:  scf
  93. label1_p4:  scf
  94. label2_p5:  db "55"     ; "55"      ; first two bytes of page 5
  95.     BLOCK   16381, 's'  ; leaves last byte of page 5 unfilled
  96. label3_p5:  ld sp,"66"  ; '166'     ; last byte of page 5, first two bytes of page 6
  97.     ASSERT $ == 0x4002 && $$ == 6
  98.     PAGE 4 : ASSERT {0x7FFE} == "77"
  99.     PAGE 5 : ASSERT {0x4000} == "55" && {0x4002} == "ss" && {0x7FFE} == "1s"
  100.     PAGE 6 : ASSERT {0x4000} == "66"
  101.  
  102.     LABELSLIST "mmu.lbl"
  103.  
  104. ;-----------------------------------------------------------
  105. ; new part to test the optional third <address> argument
  106.     ; syntax errors
  107.     MMU 0 e,0,
  108.     MMU 0 e,0,!
  109.     MMU 0 e,0,0,
  110.  
  111.     ; valid syntax with address -exercise different code-paths
  112.     ORG 0x1234
  113.     MMU 0, 0, 0x4000
  114.     ASSERT 0x4000 == $ && 6 == $$ && {0x0000} == "00" && {$} == "66"
  115.     MMU 0, 5, 0x12345   ; warning about truncating the address
  116.     ASSERT 0x2345 == $ && 5 == $$
  117.     DISP 0x8765
  118.     MMU 0, 7, 0x1234
  119.     ASSERT 0x1234 == $ && 7 ==  $$
  120.     MMU 0, 6, 0x3456    ; displacedorg-ok - suppress warning about ORG inside DISP
  121.     ASSERT 0x3456 == $ && 6 ==  $$
  122.     ENT
  123.     ASSERT 0x2345 == $ && 6 ==  $$
  124.