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  1. ;  The syntax `<label>+*[:]` is meant to be used as self-modify-code marker only,
  2. ; with the assembler automatically suggesting most meaningful offset.
  3.  
  4.     OPT --zxnext    ; enable also extra instructions of ZX Next
  5.     org $8000
  6.     ; valid extra syntax (colon is optional)
  7. lA+*    and 1
  8. lB+*:   and 2
  9. lC+*:   and 3 : nop
  10.  
  11.     ; test all valid instructions of Z80 and Z80N
  12.     ; (and I don't care about testing invalid ones, they *should* fail, but it's not tested)
  13. ; $0x opcodes
  14.     ASSERT $8007+1 == _ld_bc_i
  15. _ld_bc_i+*:     ld      bc,$1234
  16.     ASSERT $800A+1 == _ld_b_i
  17. _ld_b_i+*:      ld      b,$56
  18.     ASSERT $800C+1 == _ld_c_i
  19. _ld_c_i+*:      ld      c,$56
  20. ; $1x opcodes
  21. Xdjnz+*:        djnz    $           ; not supported
  22.     ASSERT $8010+1 == _ld_de_i
  23. _ld_de_i+*:     ld      de,$1234
  24.     ASSERT $8013+1 == _ld_d_i
  25. _ld_d_i+*:      ld      d,$56
  26. Xjr+*:          jr      $           ; not supported
  27.     ASSERT $8017+1 == _ld_e_i
  28. _ld_e_i+*:      ld      e,$56
  29. ; $2x opcodes
  30. Xjr_nz+*:       jr      nz,$        ; not supported
  31.     ASSERT $801B+1 == _ld_hl_i
  32. _ld_hl_i+*:     ld      hl,$1234
  33.     ASSERT $801E+1 == _ld_m_hl
  34. _ld_m_hl+*:     ld      ($1234),hl
  35.     ASSERT $8021+1 == _ld_h_i
  36. _ld_h_i+*:      ld      h,$56
  37. Xjr_z+*:        jr      z,$         ; not supported
  38.     ASSERT $8025+1 == _ld_hl_m
  39. _ld_hl_m+*:     ld      hl,($1234)
  40.     ASSERT $8028+1 == _ld_l_i
  41. _ld_l_i+*:      ld      l,$56
  42. ; $3x opcodes
  43. Xjr_nc+*:       jr      nc,$        ; not supported
  44.     ASSERT $802C+1 == _ld_sp_i
  45. _ld_sp_i+*:     ld      sp,$1234
  46.     ASSERT $802F+1 == _ld_m_a
  47. _ld_m_a+*:      ld      ($1234),a
  48.     ASSERT $8032+1 == _ld_memhl_i
  49. _ld_memhl_i+*:  ld      (hl),$56
  50. Xjr_c+*:        jr      c,$         ; not supported
  51.     ASSERT $8036+1 == _ld_a_m
  52. _ld_a_m+*:      ld      a,($1234)
  53.     ASSERT $8039+1 == _ld_a_i
  54. _ld_a_i+*:      ld      a,$56
  55. ; $Cx opcodes
  56.     ASSERT $803B+1 == _jp_nz
  57. _jp_nz+*:       jp      nz,$
  58.     ASSERT $803E+1 == _jp
  59. _jp+*:          jp      $
  60.     ASSERT $8041+1 == _call_nz
  61. _call_nz+*:     call    nz,$
  62.     ASSERT $8044+1 == _add_i
  63. _add_i+*:       add     a,$56
  64.     ASSERT $8046+1 == _jp_z
  65. _jp_z+*:        jp      z,$
  66.     ASSERT $8049+1 == _call_z
  67. _call_z+*:      call    z,$
  68.     ASSERT $804C+1 == _call
  69. _call+*:        call    $
  70.     ASSERT $804F+1 == _adc_i
  71. _adc_i+*:       adc     a,$56
  72. ; $Dx opcodes
  73.     ASSERT $8051+1 == _jp_nc
  74. _jp_nc+*:       jp      nc,$
  75. Xout_n+*:       out     ($56),a     ; not supported
  76.     ASSERT $8056+1 == _call_nc
  77. _call_nc+*:     call    nc,$
  78.     ASSERT $8059+1 == _sub_i
  79. _sub_i+*:       sub     $56
  80.     ASSERT $805B+1 == _jp_c
  81. _jp_c+*:        jp      c,$
  82. Xin_n+*:        in      a,($56)     ; not supported
  83.     ASSERT $8060+1 == _call_c
  84. _call_c+*:      call    c,$
  85.     ASSERT $8063+1 == _sbc_i
  86. _sbc_i+*:       sbc     a,$56
  87. ; $Ex opcodes
  88.     ASSERT $8065+1 == _jp_po
  89. _jp_po+*:       jp      po,$
  90.     ASSERT $8068+1 == _call_po
  91. _call_po+*:     call    po,$
  92.     ASSERT $806B+1 == _and_i
  93. _and_i+*:       and     $56
  94.     ASSERT $806D+1 == _jp_pe
  95. _jp_pe+*:       jp      pe,$
  96.     ASSERT $8070+1 == _call_pe
  97. _call_pe+*:     call    pe,$
  98.     ASSERT $8073+1 == _xor_i
  99. _xor_i+*:       xor     $56
  100. ; $Fx opcodes
  101.     ASSERT $8075+1 == _jp_p
  102. _jp_p+*:        jp      p,$
  103.     ASSERT $8078+1 == _call_p
  104. _call_p+*:      call    p,$
  105.     ASSERT $807B+1 == _or_i
  106. _or_i+*:        or      $56
  107.     ASSERT $807D+1 == _jp_m
  108. _jp_m+*:        jp      m,$
  109.     ASSERT $8080+1 == _call_m
  110. _call_m+*:      call    m,$
  111.     ASSERT $8083+1 == _cp_i
  112. _cp_i+*:        cp      $56
  113.  
  114. ; $ED regular Z80
  115.     ASSERT $8085+2 == _ld_m_bc
  116. _ld_m_bc+*:     ld      ($1234),bc
  117.     ASSERT $8089+2 == _ld_bc_m
  118. _ld_bc_m+*:     ld      bc,($1234)
  119.     ASSERT $808D+2 == _ld_m_de
  120. _ld_m_de+*:     ld      ($1234),de
  121.     ASSERT $8091+2 == _ld_de_m
  122. _ld_de_m+*:     ld      de,($1234)
  123.     ASSERT $8095+2 == _ld_m_sp
  124. _ld_m_sp+*:     ld      ($1234),sp
  125.     ASSERT $8099+2 == _ld_sp_m
  126. _ld_sp_m+*:     ld      sp,($1234)
  127.  
  128. ; IX prefix $DD 2x opcodes
  129.     ASSERT $809D+2 == _ld_ix_i
  130. _ld_ix_i+*:     ld      ix,$1234
  131.     ASSERT $80A1+2 == _ld_m_ix
  132. _ld_m_ix+*:     ld      ($1234),ix
  133.     ASSERT $80A5+2 == _ld_ixh_i
  134. _ld_ixh_i+*:    ld      ixh,$56
  135.     ASSERT $80A8+2 == _ld_ix_m
  136. _ld_ix_m+*:     ld      ix,($1234)
  137.     ASSERT $80AC+2 == _ld_ixl_i
  138. _ld_ixl_i+*:    ld      ixl,$56
  139. ; IX prefix $DD 3x opcodes
  140. Xinc_memix+*:   inc     (ix+$78)    ; not supported
  141. Xdec_memix+*:   dec     (ix+$78)    ; not supported
  142.     ASSERT $80B5+3 == _ld_memix_i
  143. _ld_memix_i+*:  ld      (ix+$78),$56
  144. ; IX prefix other only having displacement => not supported (not testing ALL of them, just few)
  145. Xld_b_memix+*:  ld      b,(ix+$78)  ; not supported
  146. Xld_memix_b+*:  ld      (ix+$78),b  ; not supported
  147. Xld_h_memix+*:  ld      h,(ix+$78)  ; not supported
  148. Xld_memix_h+*:  ld      (ix+$78),h  ; not supported
  149. Xld_a_memix+*:  ld      a,(ix+$78)  ; not supported
  150. Xld_memix_a+*:  ld      (ix+$78),a  ; not supported
  151. Xadd_memix+*:   add     a,(ix+$78)  ; not supported
  152. Xadc_memix+*:   adc     a,(ix+$78)  ; not supported
  153. Xxor_memix+*:   xor     (ix+$78)    ; not supported
  154. ; IX bit instructions $DD CB ...
  155. Xrlc_memix+*:   rlc     (ix+$78)    ; not supported
  156. Xrrc_memix+*:   rrc     (ix+$78)    ; not supported
  157. Xrl_memix+*:    rl      (ix+$78)    ; not supported
  158. Xrr_memix+*:    rr      (ix+$78)    ; not supported
  159. Xsla_memix+*:   sla     (ix+$78)    ; not supported
  160. Xsra_memix+*:   sra     (ix+$78)    ; not supported
  161. Xbit0_memix+*:  bit     0,(ix+$78)  ; not supported
  162. Xres1_memix+*:  res     1,(ix+$78)  ; not supported
  163. Xset2_memix+*:  set     2,(ix+$78)  ; not supported
  164.  
  165. ; IY prefix $DD 2x opcodes
  166.     ASSERT $80F8+2 == _ld_iy_i
  167. _ld_iy_i+*:     ld      iy,$1234
  168.     ASSERT $80FC+2 == _ld_m_iy
  169. _ld_m_iy+*:     ld      ($1234),iy
  170.     ASSERT $8100+2 == _ld_iyh_i
  171. _ld_iyh_i+*:    ld      iyh,$56
  172.     ASSERT $8103+2 == _ld_iy_m
  173. _ld_iy_m+*:     ld      iy,($1234)
  174.     ASSERT $8107+2 == _ld_iyl_i
  175. _ld_iyl_i+*:    ld      iyl,$56
  176. ; IY prefix $DD 3x opcodes
  177. Xinc_memiy+*:   inc     (iy+$78)    ; not supported
  178. Xdec_memiy+*:   dec     (iy+$78)    ; not supported
  179.     ASSERT $8110+3 == _ld_memiy_i
  180. _ld_memiy_i+*:  ld      (iy+$78),$56
  181. ; IY prefix other only having displacement => not supported (not testing ALL of them, just few)
  182. Xld_b_memiy+*:  ld      b,(iy+$78)  ; not supported
  183. Xld_memiy_b+*:  ld      (iy+$78),b  ; not supported
  184. Xld_h_memiy+*:  ld      h,(iy+$78)  ; not supported
  185. Xld_memiy_h+*:  ld      (iy+$78),h  ; not supported
  186. Xld_a_memiy+*:  ld      a,(iy+$78)  ; not supported
  187. Xld_memiy_a+*:  ld      (iy+$78),a  ; not supported
  188. Xadd_memiy+*:   add     a,(iy+$78)  ; not supported
  189. Xadc_memiy+*:   adc     a,(iy+$78)  ; not supported
  190. Xxor_memiy+*:   xor     (iy+$78)    ; not supported
  191. ; IY bit instructions $DD CB ...
  192. Xrlc_memiy+*:   rlc     (iy+$78)    ; not supported
  193. Xrrc_memiy+*:   rrc     (iy+$78)    ; not supported
  194. Xrl_memiy+*:    rl      (iy+$78)    ; not supported
  195. Xrr_memiy+*:    rr      (iy+$78)    ; not supported
  196. Xsla_memiy+*:   sla     (iy+$78)    ; not supported
  197. Xsra_memiy+*:   sra     (iy+$78)    ; not supported
  198. Xbit0_memiy+*:  bit     0,(iy+$78)  ; not supported
  199. Xres1_memiy+*:  res     1,(iy+$78)  ; not supported
  200. Xset2_memiy+*:  set     2,(iy+$78)  ; not supported
  201.  
  202. ; $ED extended Z80N
  203.     ASSERT $8153+2 == _test_i
  204. _test_i+*:      test    $56
  205.     ASSERT $8156+2 == _add_hl_i
  206. _add_hl_i+*:    add     hl,$1234
  207.     ASSERT $815A+2 == _add_de_i
  208. _add_de_i+*:    add     de,$1234
  209.     ASSERT $815E+2 == _add_bc_i
  210. _add_bc_i+*:    add     bc,$1234
  211. Xpush_i+*:      push    $1234       ; not supported
  212.     ASSERT $8166+3 == _nextreg_i
  213. _nextreg_i+*:   nextreg $AA,$56
  214. Xnextreg_a+*:   nextreg $AA,a       ; not supported
  215.  
  216. ;---------------------------------------------------------------------------------------------------------
  217.     ; syntax errors ('*' only)
  218. lD+*0   and 4
  219. lE+*a   and 5
  220. lDb+*0: and 42
  221. lEb+*a: and 52
  222.     ; syntax errors (no minus either)
  223. lF-*    and 6
  224. lG-*:   and 7
  225.     ; error unresolved (no suitable instruction is on the line)
  226. lH+*
  227. lI+*:
  228. lJ+*:   nop
  229. lK+*:   nop : and 8         ; must be first instruction after smc label, not second+
  230.  
  231.     ; syntax errors, using SMC label in unsupported context
  232. 123+*   jr  123B
  233. 124+*:  jr  124B
  234.  
  235. lL+*    MACRO
  236.             nop
  237.         ENDM
  238.         lL
  239.  
  240.         STRUCT S_TEST
  241. Byte        BYTE    0x12
  242. Smc+*       BYTE    0x34    ; error, can't have SMC
  243.         ENDS
  244.  
  245. NormalStruct    S_TEST
  246. SmcStruct+*     S_TEST      ; error, can't have SMC
  247.  
  248.     ; mismatch errors
  249.  
  250.     ; different position of line while same amount of SMC labels (mismatch in pass 3)
  251.     IF 1 == __PASS__
  252. lM+*:   and 9
  253.     ELSE
  254. lM+*:   and 9               ; mismatch reported here (in pass 3)
  255.     ENDIF
  256.  
  257.     ; mismatch by swapping order between passes
  258.     IF 1 == __PASS__
  259. lN+*:   and 10
  260.     ENDIF
  261. lO+*    and 11              ; mismatch
  262.     IF 1 < __PASS__
  263. lN+*:   and 10              ; mismatch
  264.     ENDIF
  265. lP+*    and 12              ; precise swap will not damage following label, this may still work (not guaranteed in future versions)
  266.  
  267.     IF 1 < __PASS__
  268. lQ+*:   and 13              ; mismatch
  269.     ENDIF
  270. lR+*:   and 14              ; but all following correct ones are also mismatched
  271.  
  272.     ASSERT $8000+1 == lA
  273.     ASSERT $8002+1 == lB
  274.     ASSERT $8004+1 == lC
  275.