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Subversion Repositories NedoOS

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  1.     OUTPUT "op_IY_BIT_FDCB.bin"
  2.  
  3.     ;;; generate shift instructions: #FDCBFF00 .. #FDCBFF3F ("iy-1" = FF index byte)
  4.     LUA ALLPASS
  5.         instructions = { 'rlc', 'rrc', 'rl', 'rr', 'sla', 'sra', 'sli', 'srl' }
  6.         registers = { '(iy-1),b', '(iy-1),c', '(iy-1),d', '(iy-1),e', '(iy-1),h', '(iy-1),l', '(iy-1)', '(iy-1),a' }
  7.         for ii = 1, #instructions do
  8.             for rr = 1, #registers do
  9.                 instruction = instructions[ii]..' '..registers[rr]
  10.                 _pc(instruction)
  11.             end
  12.         end
  13.     ENDLUA
  14.  
  15.     ;;; generate `bit` instructions: #FDCBFF46 .. #FDCBFF7E (two: {#x6, #xE})
  16.     LUA ALLPASS
  17.         for bb = 0, 7 do
  18.             instruction = 'bit '..bb..',(iy-1)'
  19.             _pc(instruction)
  20.         end
  21.     ENDLUA
  22.  
  23.     ;;; generate `res` + `set` instructions: #FDCB1180 .. #FDCB11FF ("iy+17" = 11 index byte)
  24.     LUA ALLPASS
  25.         instructions = { 'res', 'set' }
  26.         registers = { '(iy+17),b', '(iy+17),c', '(iy+17),d', '(iy+17),e', '(iy+17),h', '(iy+17),l', '(iy+17)', '(iy+17),a' }
  27.         for ii = 1, #instructions do
  28.             for bb = 0, 7 do
  29.                 for rr = 1, #registers do
  30.                     instruction = instructions[ii]..' '..bb..','..registers[rr]
  31.                     _pc(instruction)
  32.                 end
  33.             end
  34.         end
  35.     ENDLUA
  36.